991a51d83a
Changes to the arch kprobes infrastructure to take advantage of the locking changes introduced by usage of RCU for synchronization. All handlers are now run without any locks held, so they have to be re-entrant or provide their own synchronization. Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
439 lines
11 KiB
C
439 lines
11 KiB
C
/* arch/sparc64/kernel/kprobes.c
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*
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* Copyright (C) 2004 David S. Miller <davem@davemloft.net>
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/kprobes.h>
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#include <asm/kdebug.h>
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#include <asm/signal.h>
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#include <asm/cacheflush.h>
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/* We do not have hardware single-stepping on sparc64.
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* So we implement software single-stepping with breakpoint
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* traps. The top-level scheme is similar to that used
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* in the x86 kprobes implementation.
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*
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* In the kprobe->ainsn.insn[] array we store the original
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* instruction at index zero and a break instruction at
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* index one.
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*
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* When we hit a kprobe we:
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* - Run the pre-handler
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* - Remember "regs->tnpc" and interrupt level stored in
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* "regs->tstate" so we can restore them later
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* - Disable PIL interrupts
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* - Set regs->tpc to point to kprobe->ainsn.insn[0]
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* - Set regs->tnpc to point to kprobe->ainsn.insn[1]
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* - Mark that we are actively in a kprobe
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*
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* At this point we wait for the second breakpoint at
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* kprobe->ainsn.insn[1] to hit. When it does we:
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* - Run the post-handler
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* - Set regs->tpc to "remembered" regs->tnpc stored above,
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* restore the PIL interrupt level in "regs->tstate" as well
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* - Make any adjustments necessary to regs->tnpc in order
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* to handle relative branches correctly. See below.
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* - Mark that we are no longer actively in a kprobe.
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*/
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DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
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DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
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int __kprobes arch_prepare_kprobe(struct kprobe *p)
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{
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return 0;
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}
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void __kprobes arch_copy_kprobe(struct kprobe *p)
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{
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p->ainsn.insn[0] = *p->addr;
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p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
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p->opcode = *p->addr;
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}
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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*p->addr = BREAKPOINT_INSTRUCTION;
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flushi(p->addr);
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}
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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*p->addr = p->opcode;
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flushi(p->addr);
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}
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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{
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}
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static inline void save_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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kcb->prev_kprobe.kp = kprobe_running();
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kcb->prev_kprobe.status = kcb->kprobe_status;
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kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
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kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
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}
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static inline void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
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kcb->kprobe_status = kcb->prev_kprobe.status;
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kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
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kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
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}
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static inline void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = p;
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kcb->kprobe_orig_tnpc = regs->tnpc;
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kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
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}
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static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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regs->tstate |= TSTATE_PIL;
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/*single step inline, if it a breakpoint instruction*/
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if (p->opcode == BREAKPOINT_INSTRUCTION) {
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regs->tpc = (unsigned long) p->addr;
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regs->tnpc = kcb->kprobe_orig_tnpc;
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} else {
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regs->tpc = (unsigned long) &p->ainsn.insn[0];
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regs->tnpc = (unsigned long) &p->ainsn.insn[1];
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}
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}
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static int __kprobes kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *p;
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void *addr = (void *) regs->tpc;
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int ret = 0;
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (kprobe_running()) {
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p = get_kprobe(addr);
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if (p) {
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if (kcb->kprobe_status == KPROBE_HIT_SS) {
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regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
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kcb->kprobe_orig_tstate_pil);
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goto no_kprobe;
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}
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/* We have reentered the kprobe_handler(), since
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* another probe was hit while within the handler.
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* We here save the original kprobes variables and
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* just single step on the instruction of the new probe
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* without calling any user handlers.
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*/
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save_previous_kprobe(kcb);
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set_current_kprobe(p, regs, kcb);
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p->nmissed++;
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kcb->kprobe_status = KPROBE_REENTER;
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prepare_singlestep(p, regs, kcb);
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return 1;
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} else {
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p = __get_cpu_var(current_kprobe);
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if (p->break_handler && p->break_handler(p, regs))
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goto ss_probe;
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}
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goto no_kprobe;
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}
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p = get_kprobe(addr);
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if (!p) {
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if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
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/*
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* The breakpoint instruction was removed right
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* after we hit it. Another cpu has removed
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* either a probepoint or a debugger breakpoint
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* at this address. In either case, no further
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* handling of this interrupt is appropriate.
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*/
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ret = 1;
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}
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/* Not one of ours: let kernel handle it */
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goto no_kprobe;
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}
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/*
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* This preempt_disable() matches the preempt_enable_no_resched()
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* in post_kprobes_handler()
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*/
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preempt_disable();
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set_current_kprobe(p, regs, kcb);
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kcb->kprobe_status = KPROBE_HIT_ACTIVE;
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if (p->pre_handler && p->pre_handler(p, regs))
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return 1;
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ss_probe:
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prepare_singlestep(p, regs, kcb);
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kcb->kprobe_status = KPROBE_HIT_SS;
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return 1;
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no_kprobe:
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return ret;
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}
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/* If INSN is a relative control transfer instruction,
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* return the corrected branch destination value.
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*
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* The original INSN location was REAL_PC, it actually
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* executed at PC and produced destination address NPC.
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*/
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static unsigned long __kprobes relbranch_fixup(u32 insn, unsigned long real_pc,
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unsigned long pc,
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unsigned long npc)
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{
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/* Branch not taken, no mods necessary. */
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if (npc == pc + 0x4UL)
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return real_pc + 0x4UL;
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/* The three cases are call, branch w/prediction,
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* and traditional branch.
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*/
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if ((insn & 0xc0000000) == 0x40000000 ||
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(insn & 0xc1c00000) == 0x00400000 ||
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(insn & 0xc1c00000) == 0x00800000) {
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/* The instruction did all the work for us
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* already, just apply the offset to the correct
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* instruction location.
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*/
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return (real_pc + (npc - pc));
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}
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return real_pc + 0x4UL;
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}
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/* If INSN is an instruction which writes it's PC location
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* into a destination register, fix that up.
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*/
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static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
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unsigned long real_pc)
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{
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unsigned long *slot = NULL;
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/* Simplest cast is call, which always uses %o7 */
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if ((insn & 0xc0000000) == 0x40000000) {
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slot = ®s->u_regs[UREG_I7];
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}
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/* Jmpl encodes the register inside of the opcode */
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if ((insn & 0xc1f80000) == 0x81c00000) {
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unsigned long rd = ((insn >> 25) & 0x1f);
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if (rd <= 15) {
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slot = ®s->u_regs[rd];
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} else {
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/* Hard case, it goes onto the stack. */
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flushw_all();
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rd -= 16;
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slot = (unsigned long *)
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(regs->u_regs[UREG_FP] + STACK_BIAS);
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slot += rd;
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}
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}
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if (slot != NULL)
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*slot = real_pc;
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}
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/*
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* Called after single-stepping. p->addr is the address of the
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* instruction whose first byte has been replaced by the breakpoint
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* instruction. To avoid the SMP problems that can occur when we
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* temporarily put back the original opcode to single-step, we
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* single-stepped a copy of the instruction. The address of this
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* copy is p->ainsn.insn.
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*
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* This function prepares to return from the post-single-step
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* breakpoint trap.
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*/
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static void __kprobes resume_execution(struct kprobe *p,
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struct pt_regs *regs, struct kprobe_ctlblk *kcb)
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{
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u32 insn = p->ainsn.insn[0];
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regs->tpc = kcb->kprobe_orig_tnpc;
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regs->tnpc = relbranch_fixup(insn,
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(unsigned long) p->addr,
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(unsigned long) &p->ainsn.insn[0],
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regs->tnpc);
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retpc_fixup(regs, insn, (unsigned long) p->addr);
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regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
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kcb->kprobe_orig_tstate_pil);
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}
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static inline int post_kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (!cur)
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return 0;
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if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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cur->post_handler(cur, regs, 0);
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}
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resume_execution(cur, regs, kcb);
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/*Restore back the original saved kprobes variables and continue. */
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if (kcb->kprobe_status == KPROBE_REENTER) {
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restore_previous_kprobe(kcb);
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goto out;
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}
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reset_current_kprobe();
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out:
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preempt_enable_no_resched();
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return 1;
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}
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static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
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return 1;
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if (kcb->kprobe_status & KPROBE_HIT_SS) {
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resume_execution(cur, regs, kcb);
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reset_current_kprobe();
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preempt_enable_no_resched();
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}
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return 0;
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}
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/*
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* Wrapper routine to for handling exceptions.
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*/
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int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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struct die_args *args = (struct die_args *)data;
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int ret = NOTIFY_DONE;
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rcu_read_lock();
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switch (val) {
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case DIE_DEBUG:
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if (kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_DEBUG_2:
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if (post_kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_GPF:
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case DIE_PAGE_FAULT:
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if (kprobe_running() &&
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kprobe_fault_handler(args->regs, args->trapnr))
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ret = NOTIFY_STOP;
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break;
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default:
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break;
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}
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rcu_read_unlock();
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return ret;
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}
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asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
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struct pt_regs *regs)
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{
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BUG_ON(trap_level != 0x170 && trap_level != 0x171);
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if (user_mode(regs)) {
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local_irq_enable();
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bad_trap(regs, trap_level);
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return;
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}
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/* trap_level == 0x170 --> ta 0x70
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* trap_level == 0x171 --> ta 0x71
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*/
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if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
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(trap_level == 0x170) ? "debug" : "debug_2",
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regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
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bad_trap(regs, trap_level);
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}
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/* Jprobes support. */
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int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
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{
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struct jprobe *jp = container_of(p, struct jprobe, kp);
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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kcb->jprobe_saved_regs_location = regs;
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memcpy(&(kcb->jprobe_saved_regs), regs, sizeof(*regs));
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/* Save a whole stack frame, this gets arguments
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* pushed onto the stack after using up all the
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* arg registers.
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*/
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memcpy(&(kcb->jprobe_saved_stack),
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(char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
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sizeof(kcb->jprobe_saved_stack));
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regs->tpc = (unsigned long) jp->entry;
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regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
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regs->tstate |= TSTATE_PIL;
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return 1;
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}
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void __kprobes jprobe_return(void)
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{
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__asm__ __volatile__(
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".globl jprobe_return_trap_instruction\n"
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"jprobe_return_trap_instruction:\n\t"
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"ta 0x70");
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}
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extern void jprobe_return_trap_instruction(void);
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extern void __show_regs(struct pt_regs * regs);
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int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
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{
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u32 *addr = (u32 *) regs->tpc;
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (addr == (u32 *) jprobe_return_trap_instruction) {
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if (kcb->jprobe_saved_regs_location != regs) {
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printk("JPROBE: Current regs (%p) does not match "
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"saved regs (%p).\n",
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regs, kcb->jprobe_saved_regs_location);
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printk("JPROBE: Saved registers\n");
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__show_regs(kcb->jprobe_saved_regs_location);
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printk("JPROBE: Current registers\n");
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__show_regs(regs);
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BUG();
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}
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/* Restore old register state. Do pt_regs
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* first so that UREG_FP is the original one for
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* the stack frame restore.
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*/
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memcpy(regs, &(kcb->jprobe_saved_regs), sizeof(*regs));
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memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
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&(kcb->jprobe_saved_stack),
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sizeof(kcb->jprobe_saved_stack));
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return 1;
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}
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return 0;
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}
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/* architecture specific initialization */
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int arch_init_kprobes(void)
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{
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return 0;
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}
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