982eee67dd
Move the parsing of the EEPROM data in scan function for one core into an own function. Now we are able to use it in some other scan function as well. Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
367 lines
9.4 KiB
C
367 lines
9.4 KiB
C
/*
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* Broadcom specific AMBA
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* Bus scanning
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include "scan.h"
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#include "bcma_private.h"
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#include <linux/bcma/bcma.h>
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#include <linux/bcma/bcma_regs.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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struct bcma_device_id_name {
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u16 id;
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const char *name;
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};
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struct bcma_device_id_name bcma_device_names[] = {
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{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
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{ BCMA_CORE_INVALID, "Invalid" },
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{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
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{ BCMA_CORE_ILINE20, "ILine 20" },
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{ BCMA_CORE_SRAM, "SRAM" },
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{ BCMA_CORE_SDRAM, "SDRAM" },
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{ BCMA_CORE_PCI, "PCI" },
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{ BCMA_CORE_MIPS, "MIPS" },
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{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
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{ BCMA_CORE_V90, "V90" },
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{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
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{ BCMA_CORE_ADSL, "ADSL" },
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{ BCMA_CORE_ILINE100, "ILine 100" },
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{ BCMA_CORE_IPSEC, "IPSEC" },
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{ BCMA_CORE_UTOPIA, "UTOPIA" },
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{ BCMA_CORE_PCMCIA, "PCMCIA" },
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{ BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
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{ BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
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{ BCMA_CORE_OFDM, "OFDM" },
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{ BCMA_CORE_EXTIF, "EXTIF" },
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{ BCMA_CORE_80211, "IEEE 802.11" },
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{ BCMA_CORE_PHY_A, "PHY A" },
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{ BCMA_CORE_PHY_B, "PHY B" },
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{ BCMA_CORE_PHY_G, "PHY G" },
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{ BCMA_CORE_MIPS_3302, "MIPS 3302" },
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{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
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{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
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{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
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{ BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
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{ BCMA_CORE_SDIO_HOST, "SDIO Host" },
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{ BCMA_CORE_ROBOSWITCH, "Roboswitch" },
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{ BCMA_CORE_PARA_ATA, "PATA" },
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{ BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
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{ BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
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{ BCMA_CORE_PCIE, "PCIe" },
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{ BCMA_CORE_PHY_N, "PHY N" },
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{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
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{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
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{ BCMA_CORE_ARM_1176, "ARM 1176" },
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{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
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{ BCMA_CORE_PHY_LP, "PHY LP" },
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{ BCMA_CORE_PMU, "PMU" },
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{ BCMA_CORE_PHY_SSN, "PHY SSN" },
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{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
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{ BCMA_CORE_ARM_CM3, "ARM CM3" },
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{ BCMA_CORE_PHY_HT, "PHY HT" },
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{ BCMA_CORE_MIPS_74K, "MIPS 74K" },
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{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
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{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
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{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
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{ BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
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{ BCMA_CORE_SHARED_COMMON, "Common Shared" },
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{ BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
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{ BCMA_CORE_SPI_HOST, "SPI Host" },
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{ BCMA_CORE_I2S, "I2S" },
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{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
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{ BCMA_CORE_SHIM, "SHIM" },
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{ BCMA_CORE_DEFAULT, "Default" },
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};
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const char *bcma_device_name(struct bcma_device_id *id)
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{
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int i;
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if (id->manuf == BCMA_MANUF_BCM) {
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for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
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if (bcma_device_names[i].id == id->id)
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return bcma_device_names[i].name;
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}
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}
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return "UNKNOWN";
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}
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static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
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u16 offset)
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{
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return readl(bus->mmio + offset);
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}
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static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
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{
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if (bus->hosttype == BCMA_HOSTTYPE_PCI)
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pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
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addr);
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}
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static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr)
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{
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u32 ent = readl(*eromptr);
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(*eromptr)++;
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return ent;
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}
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static void bcma_erom_push_ent(u32 **eromptr)
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{
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(*eromptr)--;
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}
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static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr)
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{
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u32 ent = bcma_erom_get_ent(bus, eromptr);
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if (!(ent & SCAN_ER_VALID))
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return -ENOENT;
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if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
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return -ENOENT;
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return ent;
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}
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static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr)
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{
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u32 ent = bcma_erom_get_ent(bus, eromptr);
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bcma_erom_push_ent(eromptr);
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return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
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}
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static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr)
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{
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u32 ent = bcma_erom_get_ent(bus, eromptr);
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bcma_erom_push_ent(eromptr);
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return (((ent & SCAN_ER_VALID)) &&
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((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
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((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
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}
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static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr)
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{
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u32 ent;
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while (1) {
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ent = bcma_erom_get_ent(bus, eromptr);
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if ((ent & SCAN_ER_VALID) &&
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((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
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break;
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if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
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break;
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}
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bcma_erom_push_ent(eromptr);
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}
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static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr)
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{
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u32 ent = bcma_erom_get_ent(bus, eromptr);
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if (!(ent & SCAN_ER_VALID))
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return -ENOENT;
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if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
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return -ENOENT;
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return ent;
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}
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static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
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u32 type, u8 port)
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{
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u32 addrl, addrh, sizel, sizeh = 0;
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u32 size;
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u32 ent = bcma_erom_get_ent(bus, eromptr);
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if ((!(ent & SCAN_ER_VALID)) ||
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((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
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((ent & SCAN_ADDR_TYPE) != type) ||
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(((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
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bcma_erom_push_ent(eromptr);
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return -EINVAL;
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}
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addrl = ent & SCAN_ADDR_ADDR;
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if (ent & SCAN_ADDR_AG32)
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addrh = bcma_erom_get_ent(bus, eromptr);
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else
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addrh = 0;
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if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
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size = bcma_erom_get_ent(bus, eromptr);
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sizel = size & SCAN_SIZE_SZ;
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if (size & SCAN_SIZE_SG32)
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sizeh = bcma_erom_get_ent(bus, eromptr);
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} else
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sizel = SCAN_ADDR_SZ_BASE <<
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((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
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return addrl;
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}
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static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
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struct bcma_device *core)
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{
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s32 tmp;
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u8 i, j;
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s32 cia, cib;
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u8 ports[2], wrappers[2];
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/* get CIs */
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cia = bcma_erom_get_ci(bus, eromptr);
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if (cia < 0) {
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bcma_erom_push_ent(eromptr);
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if (bcma_erom_is_end(bus, eromptr))
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return -ESPIPE;
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return -EILSEQ;
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}
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cib = bcma_erom_get_ci(bus, eromptr);
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if (cib < 0)
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return -EILSEQ;
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/* parse CIs */
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core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
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core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
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core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
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ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
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ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
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wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
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wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
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core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
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if (((core->id.manuf == BCMA_MANUF_ARM) &&
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(core->id.id == 0xFFF)) ||
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(ports[1] == 0)) {
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bcma_erom_skip_component(bus, eromptr);
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return -ENXIO;
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}
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/* check if component is a core at all */
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if (wrappers[0] + wrappers[1] == 0) {
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/* we could save addrl of the router
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if (cid == BCMA_CORE_OOB_ROUTER)
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*/
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bcma_erom_skip_component(bus, eromptr);
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return -ENXIO;
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}
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if (bcma_erom_is_bridge(bus, eromptr)) {
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bcma_erom_skip_component(bus, eromptr);
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return -ENXIO;
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}
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/* get & parse master ports */
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for (i = 0; i < ports[0]; i++) {
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u32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
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if (mst_port_d < 0)
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return -EILSEQ;
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}
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/* get & parse slave ports */
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for (i = 0; i < ports[1]; i++) {
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_SLAVE, i);
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if (tmp < 0) {
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/* no more entries for port _i_ */
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/* pr_debug("erom: slave port %d "
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* "has %d descriptors\n", i, j); */
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break;
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} else {
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if (i == 0 && j == 0)
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core->addr = tmp;
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}
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}
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}
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/* get & parse master wrappers */
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for (i = 0; i < wrappers[0]; i++) {
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_MWRAP, i);
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if (tmp < 0) {
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/* no more entries for port _i_ */
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/* pr_debug("erom: master wrapper %d "
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* "has %d descriptors\n", i, j); */
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break;
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} else {
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if (i == 0 && j == 0)
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core->wrap = tmp;
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}
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}
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}
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/* get & parse slave wrappers */
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for (i = 0; i < wrappers[1]; i++) {
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u8 hack = (ports[1] == 1) ? 0 : 1;
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_SWRAP, i + hack);
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if (tmp < 0) {
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/* no more entries for port _i_ */
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/* pr_debug("erom: master wrapper %d "
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* has %d descriptors\n", i, j); */
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break;
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} else {
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if (wrappers[0] == 0 && !i && !j)
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core->wrap = tmp;
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}
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}
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}
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return 0;
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}
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int bcma_bus_scan(struct bcma_bus *bus)
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{
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u32 erombase;
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u32 __iomem *eromptr, *eromend;
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s32 tmp;
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int err;
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INIT_LIST_HEAD(&bus->cores);
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bus->nr_cores = 0;
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bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
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tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
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bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
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bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
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bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
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erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
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eromptr = bus->mmio;
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eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
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bcma_scan_switch_core(bus, erombase);
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while (eromptr < eromend) {
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struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
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if (!core)
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return -ENOMEM;
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INIT_LIST_HEAD(&core->list);
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core->bus = bus;
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err = bcma_get_next_core(bus, &eromptr, core);
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if (err == -ENXIO)
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continue;
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else if (err == -ESPIPE)
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break;
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else if (err < 0)
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return err;
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pr_info("Core %d found: %s "
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"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
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bus->nr_cores, bcma_device_name(&core->id),
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core->id.manuf, core->id.id, core->id.rev,
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core->id.class);
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core->core_index = bus->nr_cores++;
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list_add(&core->list, &bus->cores);
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}
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return 0;
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}
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