94cc6a8656
The structure sdhci_pltfm_data is not necessarily to be in a public header like include/linux/mmc/sdhci-pltfm.h, so the patch moves it into drivers/mmc/host/sdhci-pltfm.h and eliminates the former one. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
382 lines
10 KiB
C
382 lines
10 KiB
C
/*
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* Freescale eSDHC i.MX controller driver for the platform bus.
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*
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* derived from the OF-version.
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*
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* Copyright (c) 2010 Pengutronix e.K.
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* Author: Wolfram Sang <w.sang@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/sdio.h>
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#include <mach/hardware.h>
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#include <mach/esdhc.h>
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#include "sdhci.h"
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#include "sdhci-pltfm.h"
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#include "sdhci-esdhc.h"
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/* VENDOR SPEC register */
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#define SDHCI_VENDOR_SPEC 0xC0
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#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002
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#define ESDHC_FLAG_GPIO_FOR_CD_WP (1 << 0)
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/*
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* The CMDTYPE of the CMD register (offset 0xE) should be set to
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* "11" when the STOP CMD12 is issued on imx53 to abort one
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* open ended multi-blk IO. Otherwise the TC INT wouldn't
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* be generated.
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* In exact block transfer, the controller doesn't complete the
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* operations automatically as required at the end of the
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* transfer and remains on hold if the abort command is not sent.
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* As a result, the TC flag is not asserted and SW received timeout
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* exeception. Bit1 of Vendor Spec registor is used to fix it.
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*/
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#define ESDHC_FLAG_MULTIBLK_NO_INT (1 << 1)
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struct pltfm_imx_data {
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int flags;
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u32 scratchpad;
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};
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static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, int reg)
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{
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void __iomem *base = host->ioaddr + (reg & ~0x3);
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u32 shift = (reg & 0x3) * 8;
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writel(((readl(base) & ~(mask << shift)) | (val << shift)), base);
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}
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static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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/* fake CARD_PRESENT flag on mx25/35 */
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u32 val = readl(host->ioaddr + reg);
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if (unlikely((reg == SDHCI_PRESENT_STATE)
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&& (imx_data->flags & ESDHC_FLAG_GPIO_FOR_CD_WP))) {
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struct esdhc_platform_data *boarddata =
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host->mmc->parent->platform_data;
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if (boarddata && gpio_is_valid(boarddata->cd_gpio)
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&& gpio_get_value(boarddata->cd_gpio))
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/* no card, if a valid gpio says so... */
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val &= SDHCI_CARD_PRESENT;
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else
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/* ... in all other cases assume card is present */
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val |= SDHCI_CARD_PRESENT;
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}
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return val;
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}
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static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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if (unlikely((reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)
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&& (imx_data->flags & ESDHC_FLAG_GPIO_FOR_CD_WP)))
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/*
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* these interrupts won't work with a custom card_detect gpio
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* (only applied to mx25/35)
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*/
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val &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
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if (unlikely((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
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&& (reg == SDHCI_INT_STATUS)
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&& (val & SDHCI_INT_DATA_END))) {
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u32 v;
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v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
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v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK;
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writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
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}
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writel(val, host->ioaddr + reg);
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}
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static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
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{
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if (unlikely(reg == SDHCI_HOST_VERSION))
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reg ^= 2;
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return readw(host->ioaddr + reg);
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}
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static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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switch (reg) {
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case SDHCI_TRANSFER_MODE:
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/*
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* Postpone this write, we must do it together with a
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* command write that is down below.
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*/
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if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
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&& (host->cmd->opcode == SD_IO_RW_EXTENDED)
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&& (host->cmd->data->blocks > 1)
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&& (host->cmd->data->flags & MMC_DATA_READ)) {
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u32 v;
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v = readl(host->ioaddr + SDHCI_VENDOR_SPEC);
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v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK;
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writel(v, host->ioaddr + SDHCI_VENDOR_SPEC);
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}
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imx_data->scratchpad = val;
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return;
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case SDHCI_COMMAND:
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if ((host->cmd->opcode == MMC_STOP_TRANSMISSION)
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&& (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
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val |= SDHCI_CMD_ABORTCMD;
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writel(val << 16 | imx_data->scratchpad,
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host->ioaddr + SDHCI_TRANSFER_MODE);
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return;
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case SDHCI_BLOCK_SIZE:
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val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
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break;
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}
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esdhc_clrset_le(host, 0xffff, val, reg);
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}
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static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
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{
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u32 new_val;
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switch (reg) {
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case SDHCI_POWER_CONTROL:
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/*
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* FSL put some DMA bits here
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* If your board has a regulator, code should be here
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*/
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return;
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case SDHCI_HOST_CONTROL:
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/* FSL messed up here, so we can just keep those two */
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new_val = val & (SDHCI_CTRL_LED | SDHCI_CTRL_4BITBUS);
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/* ensure the endianess */
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new_val |= ESDHC_HOST_CONTROL_LE;
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/* DMA mode bits are shifted */
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new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5;
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esdhc_clrset_le(host, 0xffff, new_val, reg);
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return;
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}
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esdhc_clrset_le(host, 0xff, val, reg);
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}
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static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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return clk_get_rate(pltfm_host->clk);
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}
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static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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return clk_get_rate(pltfm_host->clk) / 256 / 16;
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}
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static struct sdhci_ops sdhci_esdhc_ops = {
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.read_l = esdhc_readl_le,
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.read_w = esdhc_readw_le,
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.write_l = esdhc_writel_le,
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.write_w = esdhc_writew_le,
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.write_b = esdhc_writeb_le,
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.set_clock = esdhc_set_clock,
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.get_max_clock = esdhc_pltfm_get_max_clock,
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.get_min_clock = esdhc_pltfm_get_min_clock,
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};
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static struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
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.quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_ADMA
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| SDHCI_QUIRK_BROKEN_CARD_DETECTION,
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/* ADMA has issues. Might be fixable */
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.ops = &sdhci_esdhc_ops,
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};
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static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
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{
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struct esdhc_platform_data *boarddata =
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host->mmc->parent->platform_data;
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if (boarddata && gpio_is_valid(boarddata->wp_gpio))
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return gpio_get_value(boarddata->wp_gpio);
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else
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return -ENOSYS;
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}
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static irqreturn_t cd_irq(int irq, void *data)
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{
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struct sdhci_host *sdhost = (struct sdhci_host *)data;
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tasklet_schedule(&sdhost->card_tasklet);
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return IRQ_HANDLED;
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};
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static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
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{
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struct sdhci_pltfm_host *pltfm_host;
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struct sdhci_host *host;
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struct esdhc_platform_data *boarddata;
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struct clk *clk;
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int err;
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struct pltfm_imx_data *imx_data;
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host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata);
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if (IS_ERR(host))
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return PTR_ERR(host);
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pltfm_host = sdhci_priv(host);
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imx_data = kzalloc(sizeof(struct pltfm_imx_data), GFP_KERNEL);
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if (!imx_data)
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return -ENOMEM;
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pltfm_host->priv = imx_data;
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clk = clk_get(mmc_dev(host->mmc), NULL);
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if (IS_ERR(clk)) {
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dev_err(mmc_dev(host->mmc), "clk err\n");
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err = PTR_ERR(clk);
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goto err_clk_get;
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}
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clk_enable(clk);
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pltfm_host->clk = clk;
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if (!cpu_is_mx25())
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host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
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if (cpu_is_mx25() || cpu_is_mx35()) {
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/* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */
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host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK;
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/* write_protect can't be routed to controller, use gpio */
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sdhci_esdhc_ops.get_ro = esdhc_pltfm_get_ro;
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}
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if (!(cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx51()))
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imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
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boarddata = host->mmc->parent->platform_data;
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if (boarddata) {
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err = gpio_request_one(boarddata->wp_gpio, GPIOF_IN, "ESDHC_WP");
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if (err) {
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dev_warn(mmc_dev(host->mmc),
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"no write-protect pin available!\n");
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boarddata->wp_gpio = err;
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}
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err = gpio_request_one(boarddata->cd_gpio, GPIOF_IN, "ESDHC_CD");
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if (err) {
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dev_warn(mmc_dev(host->mmc),
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"no card-detect pin available!\n");
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goto no_card_detect_pin;
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}
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/* i.MX5x has issues to be researched */
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if (!cpu_is_mx25() && !cpu_is_mx35())
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goto not_supported;
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err = request_irq(gpio_to_irq(boarddata->cd_gpio), cd_irq,
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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mmc_hostname(host->mmc), host);
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if (err) {
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dev_warn(mmc_dev(host->mmc), "request irq error\n");
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goto no_card_detect_irq;
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}
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imx_data->flags |= ESDHC_FLAG_GPIO_FOR_CD_WP;
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/* Now we have a working card_detect again */
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host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
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}
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err = sdhci_add_host(host);
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if (err)
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goto err_add_host;
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return 0;
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no_card_detect_irq:
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gpio_free(boarddata->cd_gpio);
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no_card_detect_pin:
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boarddata->cd_gpio = err;
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not_supported:
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kfree(imx_data);
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err_add_host:
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clk_disable(pltfm_host->clk);
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clk_put(pltfm_host->clk);
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err_clk_get:
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sdhci_pltfm_free(pdev);
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return err;
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}
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static int __devexit sdhci_esdhc_imx_remove(struct platform_device *pdev)
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{
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struct sdhci_host *host = platform_get_drvdata(pdev);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
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sdhci_remove_host(host, dead);
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if (boarddata && gpio_is_valid(boarddata->wp_gpio))
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gpio_free(boarddata->wp_gpio);
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if (boarddata && gpio_is_valid(boarddata->cd_gpio)) {
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gpio_free(boarddata->cd_gpio);
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if (!(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION))
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free_irq(gpio_to_irq(boarddata->cd_gpio), host);
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}
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clk_disable(pltfm_host->clk);
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clk_put(pltfm_host->clk);
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kfree(imx_data);
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sdhci_pltfm_free(pdev);
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return 0;
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}
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static struct platform_driver sdhci_esdhc_imx_driver = {
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.driver = {
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.name = "sdhci-esdhc-imx",
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.owner = THIS_MODULE,
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},
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.probe = sdhci_esdhc_imx_probe,
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.remove = __devexit_p(sdhci_esdhc_imx_remove),
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#ifdef CONFIG_PM
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.suspend = sdhci_pltfm_suspend,
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.resume = sdhci_pltfm_resume,
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#endif
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};
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static int __init sdhci_esdhc_imx_init(void)
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{
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return platform_driver_register(&sdhci_esdhc_imx_driver);
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}
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module_init(sdhci_esdhc_imx_init);
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static void __exit sdhci_esdhc_imx_exit(void)
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{
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platform_driver_unregister(&sdhci_esdhc_imx_driver);
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}
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module_exit(sdhci_esdhc_imx_exit);
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MODULE_DESCRIPTION("SDHCI driver for Freescale i.MX eSDHC");
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MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
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MODULE_LICENSE("GPL v2");
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