Kirill A. Shutemov 910a17e57a ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size ... Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5. It's not true at least for CPUs based on Cortex-A8. List of CPUs with cache line size != 32 should be expanded later. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2009-09-15 22:06:38 +01:00
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asm	ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size	2009-09-15 22:06:38 +01:00