5e96da5d50
The 'PCOM' method of clock control (commands issued to the radio CPU) is shared across several (but not all) Qualcomm SOCs. Generalize this clock mechanism so these other SOCs can be added. Signed-off-by: Gregory Bean <gbean@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
/* arch/arm/mach-msm/clock.h
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
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#define __ARCH_ARM_MACH_MSM_CLOCK_H
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#include <linux/list.h>
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#include <mach/clk.h>
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#include "clock-pcom.h"
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#define CLKFLAG_INVERT 0x00000001
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#define CLKFLAG_NOINVERT 0x00000002
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#define CLKFLAG_NONEST 0x00000004
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#define CLKFLAG_NORESET 0x00000008
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#define CLK_FIRST_AVAILABLE_FLAG 0x00000100
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#define CLKFLAG_AUTO_OFF 0x00000200
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#define CLKFLAG_MIN 0x00000400
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#define CLKFLAG_MAX 0x00000800
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struct clk_ops {
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int (*enable)(unsigned id);
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void (*disable)(unsigned id);
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void (*auto_off)(unsigned id);
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int (*reset)(unsigned id, enum clk_reset_action action);
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int (*set_rate)(unsigned id, unsigned rate);
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int (*set_min_rate)(unsigned id, unsigned rate);
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int (*set_max_rate)(unsigned id, unsigned rate);
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int (*set_flags)(unsigned id, unsigned flags);
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unsigned (*get_rate)(unsigned id);
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unsigned (*is_enabled)(unsigned id);
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long (*round_rate)(unsigned id, unsigned rate);
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};
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struct clk {
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uint32_t id;
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uint32_t remote_id;
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uint32_t count;
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uint32_t flags;
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const char *name;
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struct clk_ops *ops;
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const char *dbg_name;
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struct list_head list;
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struct device *dev;
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};
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#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
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#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
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#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
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#ifdef CONFIG_DEBUG_FS
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#define CLOCK_DBG_NAME(x) .dbg_name = x,
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#else
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#define CLOCK_DBG_NAME(x)
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#endif
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#define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
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.name = clk_name, \
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.id = clk_id, \
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.flags = clk_flags, \
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.dev = clk_dev, \
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CLOCK_DBG_NAME(#clk_id) \
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}
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#define OFF CLKFLAG_AUTO_OFF
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#define CLK_MIN CLKFLAG_MIN
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#define CLK_MAX CLKFLAG_MAX
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#define CLK_MINMAX (CLK_MIN | CLK_MAX)
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#define NR_CLKS P_NR_CLKS
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enum {
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PLL_0 = 0,
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PLL_1,
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PLL_2,
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PLL_3,
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PLL_4,
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PLL_5,
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PLL_6,
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NUM_PLL
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};
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enum clkvote_client {
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CLKVOTE_ACPUCLK = 0,
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CLKVOTE_PMQOS,
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CLKVOTE_MAX,
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};
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int msm_clock_require_tcxo(unsigned long *reason, int nbits);
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int msm_clock_get_name(uint32_t id, char *name, uint32_t size);
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int ebi1_clk_set_min_rate(enum clkvote_client client, unsigned long rate);
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unsigned long clk_get_max_axi_khz(void);
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#endif
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