af93574678
Multi Format Codec 5.1 is a hardware video coding acceleration module found in the S5PV210 and Exynos4 Samsung SoCs. It is capable of handling a range of video codecs and this driver provides a V4L2 interface for video decoding and encoding. Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Jeongtae Park <jtp.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
121 lines
3.4 KiB
C
121 lines
3.4 KiB
C
/*
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* linux/drivers/media/video/s5p-mfc/s5p_mfc_cmd.c
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*
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* Copyright (C) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "regs-mfc.h"
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#include "s5p_mfc_cmd.h"
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#include "s5p_mfc_common.h"
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#include "s5p_mfc_debug.h"
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/* This function is used to send a command to the MFC */
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static int s5p_mfc_cmd_host2risc(struct s5p_mfc_dev *dev, int cmd,
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struct s5p_mfc_cmd_args *args)
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{
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int cur_cmd;
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unsigned long timeout;
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timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT);
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/* wait until host to risc command register becomes 'H2R_CMD_EMPTY' */
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do {
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if (time_after(jiffies, timeout)) {
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mfc_err("Timeout while waiting for hardware\n");
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return -EIO;
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}
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cur_cmd = mfc_read(dev, S5P_FIMV_HOST2RISC_CMD);
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} while (cur_cmd != S5P_FIMV_H2R_CMD_EMPTY);
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mfc_write(dev, args->arg[0], S5P_FIMV_HOST2RISC_ARG1);
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mfc_write(dev, args->arg[1], S5P_FIMV_HOST2RISC_ARG2);
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mfc_write(dev, args->arg[2], S5P_FIMV_HOST2RISC_ARG3);
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mfc_write(dev, args->arg[3], S5P_FIMV_HOST2RISC_ARG4);
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/* Issue the command */
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mfc_write(dev, cmd, S5P_FIMV_HOST2RISC_CMD);
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return 0;
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}
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/* Initialize the MFC */
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int s5p_mfc_sys_init_cmd(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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h2r_args.arg[0] = dev->fw_size;
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return s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_SYS_INIT, &h2r_args);
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}
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/* Suspend the MFC hardware */
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int s5p_mfc_sleep_cmd(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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return s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_SLEEP, &h2r_args);
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}
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/* Wake up the MFC hardware */
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int s5p_mfc_wakeup_cmd(struct s5p_mfc_dev *dev)
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{
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struct s5p_mfc_cmd_args h2r_args;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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return s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_WAKEUP, &h2r_args);
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}
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int s5p_mfc_open_inst_cmd(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_cmd_args h2r_args;
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int ret;
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/* Preparing decoding - getting instance number */
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mfc_debug(2, "Getting instance number (codec: %d)\n", ctx->codec_mode);
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dev->curr_ctx = ctx->num;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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h2r_args.arg[0] = ctx->codec_mode;
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h2r_args.arg[1] = 0; /* no crc & no pixelcache */
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h2r_args.arg[2] = ctx->ctx_ofs;
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h2r_args.arg[3] = ctx->ctx_size;
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ret = s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_OPEN_INSTANCE,
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&h2r_args);
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if (ret) {
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mfc_err("Failed to create a new instance\n");
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ctx->state = MFCINST_ERROR;
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}
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return ret;
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}
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int s5p_mfc_close_inst_cmd(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_cmd_args h2r_args;
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int ret;
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if (ctx->state == MFCINST_FREE) {
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mfc_err("Instance already returned\n");
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ctx->state = MFCINST_ERROR;
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return -EINVAL;
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}
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/* Closing decoding instance */
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mfc_debug(2, "Returning instance number %d\n", ctx->inst_no);
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dev->curr_ctx = ctx->num;
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memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args));
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h2r_args.arg[0] = ctx->inst_no;
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ret = s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_CLOSE_INSTANCE,
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&h2r_args);
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if (ret) {
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mfc_err("Failed to return an instance\n");
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ctx->state = MFCINST_ERROR;
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return -EINVAL;
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}
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return 0;
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}
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