37448f7d39
This patch replaces current PowerPC 4xx EMAC driver with new, re-written from the scratch version. This patch is quite big (~234K) because there is virtualy 0% of common code between old and new version. New driver uses NAPI, it solves stability problems under heavy packet load and low memory, corrects chip register access and fixes numerous small bugs I don't even remember now. This patch has been tested on all supported in 2.6 PPC 4xx boards. It's been used in production for almost a year now on custom 4xx hardware. PPC32 specific parts are already upstream. Patch was acked by the current EMAC driver maintainer (Matt Porter). I will be maintaining this new version. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> -- Kconfig | 72 ibm_emac/Makefile | 13 ibm_emac/ibm_emac.h | 418 +++-- ibm_emac/ibm_emac_core.c | 3414 ++++++++++++++++++++++++---------------------- ibm_emac/ibm_emac_core.h | 313 ++-- ibm_emac/ibm_emac_debug.c | 377 ++--- ibm_emac/ibm_emac_debug.h | 63 ibm_emac/ibm_emac_mal.c | 674 +++++---- ibm_emac/ibm_emac_mal.h | 336 +++- ibm_emac/ibm_emac_phy.c | 335 ++-- ibm_emac/ibm_emac_phy.h | 105 - ibm_emac/ibm_emac_rgmii.c | 201 ++ ibm_emac/ibm_emac_rgmii.h | 68 ibm_emac/ibm_emac_tah.c | 111 + ibm_emac/ibm_emac_tah.h | 96 - ibm_emac/ibm_emac_zmii.c | 255 +++ ibm_emac/ibm_emac_zmii.h | 114 - 17 files changed, 4114 insertions(+), 2851 deletions(-) Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/*
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* drivers/net/ibm_emac/ibm_emac_phy.h
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*
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* Driver for PowerPC 4xx on-chip ethernet controller, PHY support
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*
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* Benjamin Herrenschmidt <benh@kernel.crashing.org>
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* February 2003
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*
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* Minor additions by Eugene Surovegin <ebs@ebshome.net>, 2004
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This file basically duplicates sungem_phy.{c,h} with different PHYs
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* supported. I'm looking into merging that in a single mii layer more
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* flexible than mii.c
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*/
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#ifndef _IBM_OCP_PHY_H_
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#define _IBM_OCP_PHY_H_
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struct mii_phy;
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/* Operations supported by any kind of PHY */
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struct mii_phy_ops {
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int (*init) (struct mii_phy * phy);
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int (*suspend) (struct mii_phy * phy, int wol_options);
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int (*setup_aneg) (struct mii_phy * phy, u32 advertise);
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int (*setup_forced) (struct mii_phy * phy, int speed, int fd);
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int (*poll_link) (struct mii_phy * phy);
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int (*read_link) (struct mii_phy * phy);
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};
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/* Structure used to statically define an mii/gii based PHY */
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struct mii_phy_def {
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u32 phy_id; /* Concatenated ID1 << 16 | ID2 */
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u32 phy_id_mask; /* Significant bits */
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u32 features; /* Ethtool SUPPORTED_* defines or
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0 for autodetect */
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int magic_aneg; /* Autoneg does all speed test for us */
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const char *name;
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const struct mii_phy_ops *ops;
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};
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/* An instance of a PHY, partially borrowed from mii_if_info */
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struct mii_phy {
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struct mii_phy_def *def;
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u32 advertising; /* Ethtool ADVERTISED_* defines */
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u32 features; /* Copied from mii_phy_def.features
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or determined automaticaly */
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int address; /* PHY address */
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int mode; /* PHY mode */
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/* 1: autoneg enabled, 0: disabled */
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int autoneg;
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/* forced speed & duplex (no autoneg)
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* partner speed & duplex & pause (autoneg)
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*/
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int speed;
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int duplex;
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int pause;
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int asym_pause;
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/* Provided by host chip */
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struct net_device *dev;
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int (*mdio_read) (struct net_device * dev, int addr, int reg);
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void (*mdio_write) (struct net_device * dev, int addr, int reg,
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int val);
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};
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/* Pass in a struct mii_phy with dev, mdio_read and mdio_write
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* filled, the remaining fields will be filled on return
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*/
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int mii_phy_probe(struct mii_phy *phy, int address);
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int mii_reset_phy(struct mii_phy *phy);
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#endif /* _IBM_OCP_PHY_H_ */
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