f00b45db02
After commit 0edb555a65 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all clk drivers to use .remove(), with the eventual goal to drop
struct platform_driver::remove_new(). As .remove() and .remove_new() have
the same prototypes, conversion is done by just changing the structure
member name in the driver initializer.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/r/20240909144026.870565-2-u.kleine-koenig@baylibre.com
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
99 lines
3.2 KiB
C
99 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 MediaTek Inc.
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* Author: Wenzhen Yu <Wenzhen Yu@mediatek.com>
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* Ryder Lee <ryder.lee@mediatek.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include "clk-mtk.h"
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#include "clk-gate.h"
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#include <dt-bindings/clock/mt7629-clk.h>
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#define GATE_PCIE(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &pcie_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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#define GATE_SSUSB(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &ssusb_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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static const struct mtk_gate_regs pcie_cg_regs = {
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.set_ofs = 0x30,
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.clr_ofs = 0x30,
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.sta_ofs = 0x30,
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};
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static const struct mtk_gate_regs ssusb_cg_regs = {
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.set_ofs = 0x30,
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.clr_ofs = 0x30,
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.sta_ofs = 0x30,
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};
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static const struct mtk_gate ssusb_clks[] = {
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GATE_SSUSB(CLK_SSUSB_U2_PHY_1P_EN, "ssusb_u2_phy_1p",
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"to_u2_phy_1p", 0),
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GATE_SSUSB(CLK_SSUSB_U2_PHY_EN, "ssusb_u2_phy_en", "to_u2_phy", 1),
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GATE_SSUSB(CLK_SSUSB_REF_EN, "ssusb_ref_en", "to_usb3_ref", 5),
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GATE_SSUSB(CLK_SSUSB_SYS_EN, "ssusb_sys_en", "to_usb3_sys", 6),
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GATE_SSUSB(CLK_SSUSB_MCU_EN, "ssusb_mcu_en", "to_usb3_mcu", 7),
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GATE_SSUSB(CLK_SSUSB_DMA_EN, "ssusb_dma_en", "to_usb3_dma", 8),
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};
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static const struct mtk_gate pcie_clks[] = {
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GATE_PCIE(CLK_PCIE_P1_AUX_EN, "pcie_p1_aux_en", "p1_1mhz", 12),
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GATE_PCIE(CLK_PCIE_P1_OBFF_EN, "pcie_p1_obff_en", "free_run_4mhz", 13),
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GATE_PCIE(CLK_PCIE_P1_AHB_EN, "pcie_p1_ahb_en", "from_top_ahb", 14),
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GATE_PCIE(CLK_PCIE_P1_AXI_EN, "pcie_p1_axi_en", "from_top_axi", 15),
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GATE_PCIE(CLK_PCIE_P1_MAC_EN, "pcie_p1_mac_en", "pcie1_mac_en", 16),
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GATE_PCIE(CLK_PCIE_P1_PIPE_EN, "pcie_p1_pipe_en", "pcie1_pipe_en", 17),
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GATE_PCIE(CLK_PCIE_P0_AUX_EN, "pcie_p0_aux_en", "p0_1mhz", 18),
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GATE_PCIE(CLK_PCIE_P0_OBFF_EN, "pcie_p0_obff_en", "free_run_4mhz", 19),
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GATE_PCIE(CLK_PCIE_P0_AHB_EN, "pcie_p0_ahb_en", "from_top_ahb", 20),
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GATE_PCIE(CLK_PCIE_P0_AXI_EN, "pcie_p0_axi_en", "from_top_axi", 21),
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GATE_PCIE(CLK_PCIE_P0_MAC_EN, "pcie_p0_mac_en", "pcie0_mac_en", 22),
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GATE_PCIE(CLK_PCIE_P0_PIPE_EN, "pcie_p0_pipe_en", "pcie0_pipe_en", 23),
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};
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static u16 rst_ofs[] = { 0x34, };
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static const struct mtk_clk_rst_desc clk_rst_desc = {
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.version = MTK_RST_SIMPLE,
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.rst_bank_ofs = rst_ofs,
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.rst_bank_nr = ARRAY_SIZE(rst_ofs),
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};
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static const struct mtk_clk_desc ssusb_desc = {
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.clks = ssusb_clks,
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.num_clks = ARRAY_SIZE(ssusb_clks),
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.rst_desc = &clk_rst_desc,
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};
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static const struct mtk_clk_desc pcie_desc = {
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.clks = pcie_clks,
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.num_clks = ARRAY_SIZE(pcie_clks),
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.rst_desc = &clk_rst_desc,
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};
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static const struct of_device_id of_match_clk_mt7629_hif[] = {
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{ .compatible = "mediatek,mt7629-pciesys", .data = &pcie_desc },
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{ .compatible = "mediatek,mt7629-ssusbsys", .data = &ssusb_desc },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, of_match_clk_mt7629_hif);
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static struct platform_driver clk_mt7629_hif_drv = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt7629-hif",
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.of_match_table = of_match_clk_mt7629_hif,
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},
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};
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module_platform_driver(clk_mt7629_hif_drv);
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MODULE_DESCRIPTION("MediaTek MT2701 HIF clocks driver");
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MODULE_LICENSE("GPL");
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