2eeb74c449
ETZPC is a peripheral and memory firewall controller that filter accesses based on Arm TrustZone secure state and Arm CPU privilege execution level. It handles MCU isolation as well. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
45 lines
1.4 KiB
Makefile
45 lines
1.4 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the bus drivers.
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#
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# Interconnect bus drivers for ARM platforms
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obj-$(CONFIG_ARM_CCI) += arm-cci.o
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obj-$(CONFIG_ARM_INTEGRATOR_LM) += arm-integrator-lm.o
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obj-$(CONFIG_HISILICON_LPC) += hisi_lpc.o
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obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmstb_gisb.o
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obj-$(CONFIG_MOXTET) += moxtet.o
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# DPAA2 fsl-mc bus
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obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
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obj-$(CONFIG_BT1_APB) += bt1-apb.o
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obj-$(CONFIG_BT1_AXI) += bt1-axi.o
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obj-$(CONFIG_IMX_WEIM) += imx-weim.o
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obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o
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obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o
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obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o
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# Interconnect bus driver for OMAP SoCs.
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obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o
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obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
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obj-$(CONFIG_QCOM_EBI2) += qcom-ebi2.o
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obj-$(CONFIG_QCOM_SSC_BLOCK_BUS) += qcom-ssc-block-bus.o
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obj-$(CONFIG_STM32_FIREWALL) += stm32_firewall.o stm32_rifsc.o stm32_etzpc.o
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obj-$(CONFIG_SUN50I_DE2_BUS) += sun50i-de2.o
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obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
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obj-$(CONFIG_OF) += simple-pm-bus.o
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obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
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obj-$(CONFIG_TEGRA_GMI) += tegra-gmi.o
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obj-$(CONFIG_TI_PWMSS) += ti-pwmss.o
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obj-$(CONFIG_TI_SYSC) += ti-sysc.o
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obj-$(CONFIG_TS_NBUS) += ts-nbus.o
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obj-$(CONFIG_UNIPHIER_SYSTEM_BUS) += uniphier-system-bus.o
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obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o
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obj-$(CONFIG_DA8XX_MSTPRI) += da8xx-mstpri.o
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# MHI
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obj-y += mhi/
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