9f200d3fed
The local_irq_disable() function and co. merely raise the interrupt mask on the MN10300 arch to exclude normal interrupts. This still lets other, higher priority maskable interrupts through, such as are used to service gdbstub's serial port and the MN10300 on-chip serial port virtual FIFOs. Provide functions to allow the maskable interrupts to be fully disabled, which will exclude those interrupts. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
201 lines
3.7 KiB
C
201 lines
3.7 KiB
C
/* MN10300 IRQ flag handling
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*
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* Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_IRQFLAGS_H
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#define _ASM_IRQFLAGS_H
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#include <asm/cpu-regs.h>
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/*
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* interrupt control
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* - "disabled": run in IM1/2
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* - level 0 - GDB stub
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* - level 1 - virtual serial DMA (if present)
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* - level 5 - normal interrupt priority
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* - level 6 - timer interrupt
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* - "enabled": run in IM7
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*/
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#ifdef CONFIG_MN10300_TTYSM
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#define MN10300_CLI_LEVEL EPSW_IM_2
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#else
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#define MN10300_CLI_LEVEL EPSW_IM_1
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#endif
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#ifndef __ASSEMBLY__
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile("mov epsw,%0" : "=d"(flags));
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return flags;
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}
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static inline void arch_local_irq_disable(void)
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{
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asm volatile(
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" and %0,epsw \n"
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" or %1,epsw \n"
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" nop \n"
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" nop \n"
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" nop \n"
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:
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: "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL)
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: "memory");
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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flags = arch_local_save_flags();
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arch_local_irq_disable();
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return flags;
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}
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/*
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* we make sure arch_irq_enable() doesn't cause priority inversion
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*/
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extern unsigned long __mn10300_irq_enabled_epsw;
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static inline void arch_local_irq_enable(void)
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{
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unsigned long tmp;
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asm volatile(
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" mov epsw,%0 \n"
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" and %1,%0 \n"
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" or %2,%0 \n"
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" mov %0,epsw \n"
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: "=&d"(tmp)
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: "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw)
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: "memory");
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}
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile(
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" mov %0,epsw \n"
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" nop \n"
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" nop \n"
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" nop \n"
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:
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: "d"(flags)
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: "memory", "cc");
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}
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static inline bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return (flags & EPSW_IM) <= MN10300_CLI_LEVEL;
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}
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static inline bool arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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/*
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* Hook to save power by halting the CPU
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* - called from the idle loop
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* - must reenable interrupts (which takes three instruction cycles to complete)
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*/
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static inline void arch_safe_halt(void)
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{
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asm volatile(
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" or %0,epsw \n"
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" nop \n"
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" nop \n"
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" bset %2,(%1) \n"
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:
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: "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)
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: "cc");
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}
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static inline void arch_local_cli(void)
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{
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asm volatile(
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" and %0,epsw \n"
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" nop \n"
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" nop \n"
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" nop \n"
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:
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: "i"(~EPSW_IE)
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: "memory"
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);
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}
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static inline unsigned long arch_local_cli_save(void)
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{
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unsigned long flags = arch_local_save_flags();
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arch_local_cli();
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return flags;
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}
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static inline void arch_local_sti(void)
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{
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asm volatile(
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" or %0,epsw \n"
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:
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: "i"(EPSW_IE)
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: "memory");
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}
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static inline void arch_local_change_intr_mask_level(unsigned long level)
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{
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asm volatile(
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" and %0,epsw \n"
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" or %1,epsw \n"
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:
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: "i"(~EPSW_IM), "i"(EPSW_IE | level)
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: "cc", "memory");
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}
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#else /* !__ASSEMBLY__ */
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#define LOCAL_SAVE_FLAGS(reg) \
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mov epsw,reg
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#define LOCAL_IRQ_DISABLE \
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and ~EPSW_IM,epsw; \
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or EPSW_IE|MN10300_CLI_LEVEL,epsw; \
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nop; \
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nop; \
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nop
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#define LOCAL_IRQ_ENABLE \
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or EPSW_IE|EPSW_IM_7,epsw
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#define LOCAL_IRQ_RESTORE(reg) \
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mov reg,epsw
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#define LOCAL_CLI_SAVE(reg) \
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mov epsw,reg; \
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and ~EPSW_IE,epsw; \
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nop; \
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nop; \
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nop
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#define LOCAL_CLI \
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and ~EPSW_IE,epsw; \
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nop; \
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nop; \
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nop
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#define LOCAL_STI \
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or EPSW_IE,epsw
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#define LOCAL_CHANGE_INTR_MASK_LEVEL(level) \
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and ~EPSW_IM,epsw; \
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or EPSW_IE|(level),epsw
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_IRQFLAGS_H */
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