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linux/arch/riscv
Linus Torvalds 97d8894b6f RISC-V Patches for the 6.12 Merge Window, Part 1
* Support for using Zkr to seed KASLR.
 * Support for IPI-triggered CPU backtracing.
 * Support for generic CPU vulnerabilities reporting to userspace.
 * A few cleanups for missing licenses.
 * The size limit on the XIP kernel has been removed.
 * Support for tracing userspace stacks.
 * Support for the Svvptc extension.
 * Various cleanups and fixes throughout the tree.
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Merge tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:

 - Support using Zkr to seed KASLR

 - Support IPI-triggered CPU backtracing

 - Support for generic CPU vulnerabilities reporting to userspace

 - A few cleanups for missing licenses

 - The size limit on the XIP kernel has been removed

 - Support for tracing userspace stacks

 - Support for the Svvptc extension

 - Various cleanups and fixes throughout the tree

* tag 'riscv-for-linus-6.12-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (47 commits)
  crash: Fix riscv64 crash memory reserve dead loop
  perf/riscv-sbi: Add platform specific firmware event handling
  tools: Optimize ring buffer for riscv
  tools: Add riscv barrier implementation
  RISC-V: Don't have MAX_PHYSMEM_BITS exceed phys_addr_t
  ACPI: NUMA: initialize all values of acpi_early_node_map to NUMA_NO_NODE
  riscv: Enable bitops instrumentation
  riscv: Omit optimized string routines when using KASAN
  ACPI: RISCV: Make acpi_numa_get_nid() to be static
  riscv: Randomize lower bits of stack address
  selftests: riscv: Allow mmap test to compile on 32-bit
  riscv: Make riscv_isa_vendor_ext_andes array static
  riscv: Use LIST_HEAD() to simplify code
  riscv: defconfig: Disable RZ/Five peripheral support
  RISC-V: Implement kgdb_roundup_cpus() to enable future NMI Roundup
  riscv: avoid Imbalance in RAS
  riscv: cacheinfo: Add back init_cache_level() function
  riscv: Remove unused _TIF_WORK_MASK
  drivers/perf: riscv: Remove redundant macro check
  riscv: define ILLEGAL_POINTER_VALUE for 64bit
  ...
2024-09-24 10:59:17 -07:00
..
boot Many singleton patches - please see the various changelogs for details. 2024-09-21 08:20:50 -07:00
configs RISC-V Patches for the 6.12 Merge Window, Part 1 2024-09-24 10:59:17 -07:00
crypto
errata riscv: errata: sifive: Use SYM_*() assembly macros 2024-09-15 00:03:22 -07:00
include RISC-V Patches for the 6.12 Merge Window, Part 1 2024-09-24 10:59:17 -07:00
kernel RISC-V Patches for the 6.12 Merge Window, Part 1 2024-09-24 10:59:17 -07:00
kvm RISC-V: KVM: Don't zero-out PMU snapshot area before freeing data 2024-08-19 08:58:17 +05:30
lib Merge patch series "riscv: Improve KASAN coverage to fix unit tests" 2024-09-19 01:10:44 -07:00
mm RISC-V Patches for the 6.12 Merge Window, Part 1 2024-09-24 10:59:17 -07:00
net RISC-V Patches for the 6.11 Merge Window, Part 1 2024-07-20 09:11:27 -07:00
purgatory Merge patch series "riscv: Improve KASAN coverage to fix unit tests" 2024-09-19 01:10:44 -07:00
tools
Kbuild
Kconfig RISC-V Patches for the 6.12 Merge Window, Part 1 2024-09-24 10:59:17 -07:00
Kconfig.debug
Kconfig.errata
Kconfig.socs
Kconfig.vendor riscv: Extend cpufeature.c to detect vendor extensions 2024-07-22 15:36:54 -07:00
Makefile riscv: boot: add Image.xz support 2024-09-01 20:43:27 -07:00
Makefile.postlink