828f0afda1
Adds basic infrastructure to allow subsystems to reserve performance counters on the x86 chips. Only UP kernels are supported in this patch to make reviewing easier. The SMP portion makes a lot more changes. Think of this as a locking mechanism where each bit represents a different counter. In addition, each subsystem should also reserve an appropriate event selection register that will correspond to the performance counter it will be using (this is mainly neccessary for the Pentium 4 chips as they break the 1:1 relationship to performance counters). This will help prevent subsystems like oprofile from interfering with the nmi watchdog. Signed-off-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
/*
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* linux/include/asm-i386/nmi.h
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*/
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#ifndef ASM_NMI_H
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#define ASM_NMI_H
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#include <linux/pm.h>
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struct pt_regs;
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typedef int (*nmi_callback_t)(struct pt_regs * regs, int cpu);
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/**
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* set_nmi_callback
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*
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* Set a handler for an NMI. Only one handler may be
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* set. Return 1 if the NMI was handled.
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*/
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void set_nmi_callback(nmi_callback_t callback);
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/**
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* unset_nmi_callback
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*
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* Remove the handler previously set.
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*/
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void unset_nmi_callback(void);
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extern int avail_to_resrv_perfctr_nmi_bit(unsigned int);
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extern int avail_to_resrv_perfctr_nmi(unsigned int);
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extern int reserve_perfctr_nmi(unsigned int);
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extern void release_perfctr_nmi(unsigned int);
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extern int reserve_evntsel_nmi(unsigned int);
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extern void release_evntsel_nmi(unsigned int);
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extern void setup_apic_nmi_watchdog (void);
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extern int reserve_lapic_nmi(void);
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extern void release_lapic_nmi(void);
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extern void disable_timer_nmi_watchdog(void);
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extern void enable_timer_nmi_watchdog(void);
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extern void nmi_watchdog_tick (struct pt_regs * regs);
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extern unsigned int nmi_watchdog;
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#define NMI_DEFAULT -1
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#define NMI_NONE 0
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#define NMI_IO_APIC 1
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#define NMI_LOCAL_APIC 2
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#define NMI_INVALID 3
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#endif /* ASM_NMI_H */
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