81fbc5ef9b
Split the wd_timer disable code out into its own file, mach-omap2/wd_timer.c; it belongs in its own file rather than cluttering up devices.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Charulatha Varadarajan <charu@ti.com>
69 lines
1.7 KiB
C
69 lines
1.7 KiB
C
/*
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* OMAP2+ MPU WD_TIMER-specific code
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <plat/omap_hwmod.h>
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/*
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* In order to avoid any assumptions from bootloader regarding WDT
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* settings, WDT module is reset during init. This enables the watchdog
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* timer. Hence it is required to disable the watchdog after the WDT reset
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* during init. Otherwise the system would reboot as per the default
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* watchdog timer registers settings.
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*/
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#define OMAP_WDT_WPS 0x34
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#define OMAP_WDT_SPR 0x48
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int omap2_wd_timer_disable(struct omap_hwmod *oh)
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{
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void __iomem *base;
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int ret;
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if (!oh) {
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pr_err("%s: Could not look up wdtimer_hwmod\n", __func__);
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return -EINVAL;
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}
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base = omap_hwmod_get_mpu_rt_va(oh);
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if (!base) {
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pr_err("%s: Could not get the base address for %s\n",
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oh->name, __func__);
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return -EINVAL;
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}
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/* Enable the clocks before accessing the WDT registers */
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ret = omap_hwmod_enable(oh);
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if (ret) {
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pr_err("%s: Could not enable clocks for %s\n",
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oh->name, __func__);
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return ret;
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}
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/* sequence required to disable watchdog */
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__raw_writel(0xAAAA, base + OMAP_WDT_SPR);
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while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
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cpu_relax();
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__raw_writel(0x5555, base + OMAP_WDT_SPR);
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while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
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cpu_relax();
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ret = omap_hwmod_idle(oh);
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if (ret)
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pr_err("%s: Could not disable clocks for %s\n",
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oh->name, __func__);
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return ret;
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}
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