423 lines
11 KiB
C
423 lines
11 KiB
C
/*
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* File: arch/blackfin/mach-bf533/H8606.c
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* Based on: arch/blackfin/mach-bf533/stamp.c
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* Author: Javier Herrero <jherrero@hvsistemas.es>
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*
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* Created: 2007
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* Description: Board Info File for the HV Sistemas H8606 board
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*
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* Modified:
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* Copyright 2005 National ICT Australia (NICTA)
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* Copyright 2004-2006 Analog Devices Inc
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* Copyright 2007 HV Sistemas S.L.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
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#include <linux/usb/isp1362.h>
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#endif
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#include <linux/ata_platform.h>
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#include <linux/irq.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/reboot.h>
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#include <asm/portmux.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "HV Sistemas H8606";
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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/*
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* Driver needs to know address, irq and flag pin.
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*/
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#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
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static struct resource dm9000_resources[] = {
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[0] = {
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.start = 0x20300000,
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.end = 0x20300000 + 8,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PF10,
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.end = IRQ_PF10,
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.flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
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},
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};
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static struct platform_device dm9000_device = {
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.id = 0,
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.name = "dm9000",
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.resource = dm9000_resources,
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.num_resources = ARRAY_SIZE(dm9000_resources),
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};
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#endif
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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static struct resource smc91x_resources[] = {
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{
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.name = "smc91x-regs",
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.start = 0x20300300,
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.end = 0x20300300 + 16,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PROG_INTB,
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.end = IRQ_PROG_INTB,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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}, {
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.start = IRQ_PF7,
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.end = IRQ_PF7,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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#endif
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#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
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static struct resource net2272_bfin_resources[] = {
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{
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.start = 0x20300000,
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.end = 0x20300000 + 0x100,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF10,
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.end = IRQ_PF10,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device net2272_bfin_device = {
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.name = "net2272",
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.id = -1,
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.num_resources = ARRAY_SIZE(net2272_bfin_resources),
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.resource = net2272_bfin_resources,
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};
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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/* all SPI peripherals info goes here */
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#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00060000,
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.offset = 0,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "kernel",
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.size = 0x100000,
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.offset = 0x60000
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}, {
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.name = "file system",
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.size = 0x6a0000,
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.offset = 0x00160000,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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.bits_per_word = 8,
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};
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#endif
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#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
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/* SPI ADC chip */
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static struct bfin5xx_spi_chip spi_adc_chip_info = {
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.ctl_reg = 0x1000,
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.enable_dma = 1, /* use dma transfer with this chip*/
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.bits_per_word = 16,
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};
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#endif
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#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
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static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
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.ctl_reg = 0x1000,
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.enable_dma = 0,
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.bits_per_word = 16,
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};
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#endif
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#if defined(CONFIG_PBX)
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static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
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.ctl_reg = 0x1c04,
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.enable_dma = 0,
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.bits_per_word = 8,
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.cs_change_per_word = 1,
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};
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#endif
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/* Notice: for blackfin, the speed_hz is the value of register
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* SPI_BAUD, not the real baudrate */
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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/* this value is the baudrate divisor */
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.max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
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{
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.modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
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.max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
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.bus_num = 1, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. */
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.platform_data = NULL, /* No spi_driver specific config */
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.controller_data = &spi_adc_chip_info,
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},
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#endif
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#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
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{
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.modalias = "ad1836-spi",
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.max_speed_hz = 16,
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.bus_num = 1,
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.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
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.controller_data = &ad1836_spi_chip_info,
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},
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#endif
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#if defined(CONFIG_PBX)
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{
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.modalias = "fxs-spi",
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.max_speed_hz = 4,
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.bus_num = 1,
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.chip_select = 3,
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.controller_data = &spi_si3xxx_chip_info,
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},
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{
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.modalias = "fxo-spi",
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.max_speed_hz = 4,
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.bus_num = 1,
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.chip_select = 2,
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.controller_data = &spi_si3xxx_chip_info,
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},
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#endif
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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};
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static struct platform_device bfin_spi0_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &bfin_spi0_info, /* Passed to driver */
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},
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};
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#endif /* spi master and devices */
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#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
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static struct platform_device bfin_fb_device = {
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.name = "bf537-fb",
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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static struct resource bfin_uart_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device bfin_uart_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart_resources),
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.resource = bfin_uart_resources,
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};
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#endif
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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#include <linux/serial_8250.h>
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#include <linux/serial.h>
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/*
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* Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
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* running at half system clock, both with interrupt output or-ed to PF8. Change to
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* suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
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*/
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static struct plat_serial8250_port serial8250_platform_data [] = {
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{
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.membase = 0x20200000,
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.mapbase = 0x20200000,
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.irq = IRQ_PF8,
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.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
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.iotype = UPIO_MEM,
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.regshift = 1,
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.uartclk = 66666667,
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}, {
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.membase = 0x20200010,
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.mapbase = 0x20200010,
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.irq = IRQ_PF8,
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.flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
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.iotype = UPIO_MEM,
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.regshift = 1,
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.uartclk = 66666667,
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}, {
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}
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};
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static struct platform_device serial8250_device = {
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.id = PLAT8250_DEV_PLATFORM,
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.name = "serial8250",
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.dev = {
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.platform_data = serial8250_platform_data,
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},
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};
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#endif
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#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
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/*
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* Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
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* interrupt output wired to PF9. Change to suit different FPGA configuration
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*/
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static struct resource opencores_kbd_resources[] = {
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[0] = {
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.start = 0x20200030,
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.end = 0x20300030 + 2,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_PF9,
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.end = IRQ_PF9,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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},
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};
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static struct platform_device opencores_kbd_device = {
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.id = -1,
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.name = "opencores-kbd",
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.resource = opencores_kbd_resources,
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.num_resources = ARRAY_SIZE(opencores_kbd_resources),
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};
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#endif
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static struct platform_device *h8606_devices[] __initdata = {
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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&rtc_device,
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#endif
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#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
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&dm9000_device,
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#endif
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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&smc91x_device,
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#endif
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#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
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&net2272_bfin_device,
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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&bfin_spi0_device,
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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&bfin_uart_device,
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#endif
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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&serial8250_device,
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#endif
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#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
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&opencores_kbd_device,
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#endif
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};
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static int __init H8606_init(void)
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{
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printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
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printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
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platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
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#endif
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return 0;
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}
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arch_initcall(H8606_init);
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