40a895fd9a
Group all cxl related kernel headers into include/cxl/ directory. Reviewed-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Link: https://patch.msgid.link/20240905223711.1990186-2-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
45 lines
1.1 KiB
C
45 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* CXL protocol Error INJection support.
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*
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* Copyright (c) 2023 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Author: Ben Cheatham <benjamin.cheatham@amd.com>
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*/
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#ifndef EINJ_CXL_H
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#define EINJ_CXL_H
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#include <linux/errno.h>
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#include <linux/types.h>
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struct pci_dev;
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struct seq_file;
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#if IS_ENABLED(CONFIG_ACPI_APEI_EINJ_CXL)
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int einj_cxl_available_error_type_show(struct seq_file *m, void *v);
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int einj_cxl_inject_error(struct pci_dev *dport_dev, u64 type);
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int einj_cxl_inject_rch_error(u64 rcrb, u64 type);
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bool einj_cxl_is_initialized(void);
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#else /* !IS_ENABLED(CONFIG_ACPI_APEI_EINJ_CXL) */
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static inline int einj_cxl_available_error_type_show(struct seq_file *m,
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void *v)
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{
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return -ENXIO;
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}
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static inline int einj_cxl_inject_error(struct pci_dev *dport_dev, u64 type)
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{
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return -ENXIO;
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}
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static inline int einj_cxl_inject_rch_error(u64 rcrb, u64 type)
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{
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return -ENXIO;
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}
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static inline bool einj_cxl_is_initialized(void) { return false; }
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#endif /* CONFIG_ACPI_APEI_EINJ_CXL */
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#endif /* EINJ_CXL_H */
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