8426e1f6af
Introduce an atomic_inc_not_zero operation. Make this a special case of atomic_add_unless because lockless pagecache actually wants atomic_inc_not_negativeone due to its offset refcount. Signed-off-by: Nick Piggin <npiggin@suse.de> Cc: "Paul E. McKenney" <paulmck@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
123 lines
2.9 KiB
C
123 lines
2.9 KiB
C
/*
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* linux/include/asm-arm26/atomic.h
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*
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* Copyright (c) 1996 Russell King.
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* Modified for arm26 by Ian Molton
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 25-11-2004 IM Updated for 2.6.9
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* 27-06-1996 RMK Created
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* 13-04-1997 RMK Made functions atomic!
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* 07-12-1997 RMK Upgraded for v2.1.
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* 26-08-1998 PJB Added #ifdef __KERNEL__
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*
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* FIXME - its probably worth seeing what these compile into...
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*/
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#ifndef __ASM_ARM_ATOMIC_H
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#define __ASM_ARM_ATOMIC_H
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#include <linux/config.h>
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#ifdef CONFIG_SMP
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#error SMP is NOT supported
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#endif
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typedef struct { volatile int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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#ifdef __KERNEL__
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#include <asm/system.h>
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#define atomic_read(v) ((v)->counter)
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#define atomic_set(v,i) (((v)->counter) = (i))
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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unsigned long flags;
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int val;
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local_irq_save(flags);
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val = v->counter;
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v->counter = val += i;
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local_irq_restore(flags);
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return val;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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unsigned long flags;
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int val;
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local_irq_save(flags);
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val = v->counter;
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v->counter = val -= i;
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local_irq_restore(flags);
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return val;
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}
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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int ret;
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unsigned long flags;
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local_irq_save(flags);
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ret = v->counter;
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if (likely(ret == old))
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v->counter = new;
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local_irq_restore(flags);
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return ret;
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}
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int ret;
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unsigned long flags;
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local_irq_save(flags);
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ret = v->counter;
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if (ret != u)
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v->counter += a;
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local_irq_restore(flags);
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return ret != u;
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
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{
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unsigned long flags;
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local_irq_save(flags);
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*addr &= ~mask;
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local_irq_restore(flags);
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}
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#define atomic_add(i, v) (void) atomic_add_return(i, v)
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#define atomic_inc(v) (void) atomic_add_return(1, v)
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#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
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#define atomic_dec(v) (void) atomic_sub_return(1, v)
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#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
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#define atomic_inc_return(v) (atomic_add_return(1, v))
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#define atomic_dec_return(v) (atomic_sub_return(1, v))
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#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
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/* Atomic operations are already serializing on ARM26 */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#endif
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#endif
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