038c5b6025
Patch from Bellido Nicolas Core support for AAEC-2000 based platforms. This is an updated version of the previous patch, and takes into account Russell's comments. AAED-2000 default configuration will follow as soon as some problems with the bootloader are sorted out... Signed-off-by: Nicolas Bellido Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
47 lines
1.8 KiB
C
47 lines
1.8 KiB
C
/*
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* linux/include/asm-arm/arch-aaec2000/irqs.h
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*
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* Copyright (c) 2005 Nicolas Bellido Y Ortega
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
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#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
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#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
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#define INT_MV_FIQ 3 /* Media Changed Interrupt */
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#define INT_SC 4 /* Sound Codec Interrupt */
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#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
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#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
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#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
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#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
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#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
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#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
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#define INT_TICK 11 /* 64Hz Tick Interrupt */
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#define INT_UART1 12 /* UART1 Interrupt */
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#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
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#define INT_LCD 14 /* LCD Interrupt */
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#define INT_SSI 15 /* SSI End of Transfer Interrupt */
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#define INT_UART3 16 /* UART3 Interrupt */
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#define INT_SCI 17 /* SCI Interrupt */
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#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
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#define INT_MMC 19 /* MMC Interrupt */
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#define INT_USB 20 /* USB Interrupt */
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#define INT_DMA 21 /* DMA Interrupt */
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#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
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#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
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#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
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#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
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#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
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#define INT_BMI 27 /* BMI Interrupt */
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#define NR_IRQS (INT_BMI + 1)
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#endif /* __ASM_ARCH_IRQS_H */
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