7bbb794031
A change to the SMP initialisation caused the following oops: CPU1: Booted secondary processor CPU1: D VIPT write-back cache CPU1: I cache: 32768 bytes, associativity 4, 32 byte lines, 256 sets CPU1: D cache: 32768 bytes, associativity 4, 32 byte lines, 256 sets <7>Calibrating delay loop... 83.14 BogoMIPS (lpj=415744) <1>Unable to handle kernel NULL pointer dereference at virtual address 0000001c ... PC is at enqueue_task+0x1c/0x64 LR is at activate_task+0xcc/0xe4 SMP initialisation now requires cpu_possible_map to be initialised in setup_arch(). Move this from smp_prepare_cpus() to smp_init_cpus() and call it from our setup_arch() if CONFIG_SMP is enabled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
139 lines
2.9 KiB
C
139 lines
2.9 KiB
C
/*
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* linux/include/asm-arm/smp.h
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*
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* Copyright (C) 2004-2005 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_SMP_H
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#define __ASM_ARM_SMP_H
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#include <linux/config.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/thread_info.h>
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#include <asm/arch/smp.h>
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#ifndef CONFIG_SMP
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# error "<asm-arm/smp.h> included in non-SMP build"
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#endif
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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/*
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* at the moment, there's not a big penalty for changing CPUs
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* (the >big< penalty is running SMP in the first place)
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*/
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#define PROC_CHANGE_PENALTY 15
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struct seq_file;
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/*
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* generate IPI list text
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*/
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extern void show_ipi_list(struct seq_file *p);
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/*
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* Called from assembly code, this handles an IPI.
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*/
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asmlinkage void do_IPI(struct pt_regs *regs);
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/*
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* Setup the SMP cpu_possible_map
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*/
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extern void smp_init_cpus(void);
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/*
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* Move global data into per-processor storage.
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*/
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extern void smp_store_cpu_info(unsigned int cpuid);
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/*
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* Raise an IPI cross call on CPUs in callmap.
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*/
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extern void smp_cross_call(cpumask_t callmap);
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/*
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* Broadcast a timer interrupt to the other CPUs.
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*/
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extern void smp_send_timer(void);
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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* This also gives us the initial stack to use for this CPU.
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*/
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extern int boot_secondary(unsigned int cpu, struct task_struct *);
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/*
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* Called from platform specific assembly code, this is the
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* secondary CPU entry point.
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*/
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asmlinkage void secondary_start_kernel(void);
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/*
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* Perform platform specific initialisation of the specified CPU.
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*/
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extern void platform_secondary_init(unsigned int cpu);
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/*
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* Initial data for bringing up a secondary CPU.
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*/
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struct secondary_data {
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unsigned long pgdir;
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void *stack;
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};
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extern struct secondary_data secondary_data;
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extern int __cpu_disable(void);
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extern int mach_cpu_disable(unsigned int cpu);
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extern void __cpu_die(unsigned int cpu);
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extern void cpu_die(void);
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extern void platform_cpu_die(unsigned int cpu);
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extern int platform_cpu_kill(unsigned int cpu);
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extern void platform_cpu_enable(unsigned int cpu);
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#ifdef CONFIG_LOCAL_TIMERS
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/*
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* Setup a local timer interrupt for a CPU.
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*/
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extern void local_timer_setup(unsigned int cpu);
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/*
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* Stop a local timer interrupt.
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*/
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extern void local_timer_stop(unsigned int cpu);
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/*
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* Platform provides this to acknowledge a local timer IRQ
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*/
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extern int local_timer_ack(void);
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#else
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static inline void local_timer_setup(unsigned int cpu)
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{
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}
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static inline void local_timer_stop(unsigned int cpu)
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{
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}
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#endif
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/*
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* show local interrupt info
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*/
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extern void show_local_irqs(struct seq_file *);
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/*
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* Called from assembly, this is the local timer IRQ handler
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*/
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asmlinkage void do_local_timer(struct pt_regs *);
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#endif /* ifndef __ASM_ARM_SMP_H */
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