752baf5647
The Sabreauto board was renamed to Armadillo2 recently. To avoid confusion, rename Sabreauto to Armadillo2/arm2. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
109 lines
2.6 KiB
C
109 lines
2.6 KiB
C
/*
|
|
* Copyright 2011 Freescale Semiconductor, Inc.
|
|
* Copyright 2011 Linaro Ltd.
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
#include <linux/init.h>
|
|
#include <linux/irq.h>
|
|
#include <linux/irqdomain.h>
|
|
#include <linux/of.h>
|
|
#include <linux/of_irq.h>
|
|
#include <linux/of_platform.h>
|
|
#include <linux/phy.h>
|
|
#include <linux/micrel_phy.h>
|
|
#include <asm/hardware/cache-l2x0.h>
|
|
#include <asm/hardware/gic.h>
|
|
#include <asm/mach/arch.h>
|
|
#include <asm/mach/time.h>
|
|
#include <mach/common.h>
|
|
#include <mach/hardware.h>
|
|
|
|
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
|
|
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
|
|
{
|
|
/* min rx data delay */
|
|
phy_write(phydev, 0x0b, 0x8105);
|
|
phy_write(phydev, 0x0c, 0x0000);
|
|
|
|
/* max rx/tx clock delay, min rx/tx control delay */
|
|
phy_write(phydev, 0x0b, 0x8104);
|
|
phy_write(phydev, 0x0c, 0xf0f0);
|
|
phy_write(phydev, 0x0b, 0x104);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __init imx6q_init_machine(void)
|
|
{
|
|
if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
|
|
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
|
|
ksz9021rn_phy_fixup);
|
|
|
|
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
|
|
|
imx6q_pm_init();
|
|
}
|
|
|
|
static void __init imx6q_map_io(void)
|
|
{
|
|
imx_lluart_map_io();
|
|
imx_scu_map_io();
|
|
imx6q_clock_map_io();
|
|
}
|
|
|
|
static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
|
|
struct device_node *interrupt_parent)
|
|
{
|
|
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
|
|
|
|
gpio_irq_base -= 32;
|
|
irq_domain_add_simple(np, gpio_irq_base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id imx6q_irq_match[] __initconst = {
|
|
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
|
|
{ .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static void __init imx6q_init_irq(void)
|
|
{
|
|
l2x0_of_init(0, ~0UL);
|
|
imx_src_init();
|
|
imx_gpc_init();
|
|
of_irq_init(imx6q_irq_match);
|
|
}
|
|
|
|
static void __init imx6q_timer_init(void)
|
|
{
|
|
mx6q_clocks_init();
|
|
}
|
|
|
|
static struct sys_timer imx6q_timer = {
|
|
.init = imx6q_timer_init,
|
|
};
|
|
|
|
static const char *imx6q_dt_compat[] __initdata = {
|
|
"fsl,imx6q-arm2",
|
|
"fsl,imx6q-sabrelite",
|
|
NULL,
|
|
};
|
|
|
|
DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
|
|
.map_io = imx6q_map_io,
|
|
.init_irq = imx6q_init_irq,
|
|
.handle_irq = imx6q_handle_irq,
|
|
.timer = &imx6q_timer,
|
|
.init_machine = imx6q_init_machine,
|
|
.dt_compat = imx6q_dt_compat,
|
|
MACHINE_END
|