ec481536b1
Unify the handling of the CPU features vectors between i386 and x86-64. This also adopts the collapsing of features which are required at compile-time into constant tests from x86-64 to i386. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
106 lines
2.8 KiB
ArmAsm
106 lines
2.8 KiB
ArmAsm
/*
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*
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* verify_cpu.S - Code for cpu long mode and SSE verification. This
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* code has been borrowed from boot/setup.S and was introduced by
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* Andi Kleen.
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*
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* Copyright (c) 2007 Andi Kleen (ak@suse.de)
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* Copyright (c) 2007 Eric Biederman (ebiederm@xmission.com)
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* Copyright (c) 2007 Vivek Goyal (vgoyal@in.ibm.com)
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*
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* This source code is licensed under the GNU General Public License,
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* Version 2. See the file COPYING for more details.
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*
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* This is a common code for verification whether CPU supports
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* long mode and SSE or not. It is not called directly instead this
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* file is included at various places and compiled in that context.
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* Following are the current usage.
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*
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* This file is included by both 16bit and 32bit code.
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*
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* arch/x86_64/boot/setup.S : Boot cpu verification (16bit)
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* arch/x86_64/boot/compressed/head.S: Boot cpu verification (32bit)
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* arch/x86_64/kernel/trampoline.S: secondary processor verfication (16bit)
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* arch/x86_64/kernel/acpi/wakeup.S:Verfication at resume (16bit)
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*
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* verify_cpu, returns the status of cpu check in register %eax.
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* 0: Success 1: Failure
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*
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* The caller needs to check for the error code and take the action
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* appropriately. Either display a message or halt.
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*/
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#include <asm/cpufeature.h>
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verify_cpu:
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pushfl # Save caller passed flags
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pushl $0 # Kill any dangerous flags
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popfl
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pushfl # standard way to check for cpuid
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popl %eax
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movl %eax,%ebx
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xorl $0x200000,%eax
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pushl %eax
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popfl
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pushfl
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popl %eax
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cmpl %eax,%ebx
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jz verify_cpu_no_longmode # cpu has no cpuid
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movl $0x0,%eax # See if cpuid 1 is implemented
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cpuid
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cmpl $0x1,%eax
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jb verify_cpu_no_longmode # no cpuid 1
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xor %di,%di
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cmpl $0x68747541,%ebx # AuthenticAMD
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jnz verify_cpu_noamd
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cmpl $0x69746e65,%edx
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jnz verify_cpu_noamd
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cmpl $0x444d4163,%ecx
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jnz verify_cpu_noamd
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mov $1,%di # cpu is from AMD
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verify_cpu_noamd:
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movl $0x1,%eax # Does the cpu have what it takes
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cpuid
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andl $REQUIRED_MASK0,%edx
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xorl $REQUIRED_MASK0,%edx
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jnz verify_cpu_no_longmode
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movl $0x80000000,%eax # See if extended cpuid is implemented
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cpuid
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cmpl $0x80000001,%eax
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jb verify_cpu_no_longmode # no extended cpuid
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movl $0x80000001,%eax # Does the cpu have what it takes
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cpuid
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andl $REQUIRED_MASK1,%edx
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xorl $REQUIRED_MASK1,%edx
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jnz verify_cpu_no_longmode
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verify_cpu_sse_test:
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movl $1,%eax
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cpuid
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andl $SSE_MASK,%edx
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cmpl $SSE_MASK,%edx
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je verify_cpu_sse_ok
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test %di,%di
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jz verify_cpu_no_longmode # only try to force SSE on AMD
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movl $0xc0010015,%ecx # HWCR
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rdmsr
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btr $15,%eax # enable SSE
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wrmsr
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xor %di,%di # don't loop
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jmp verify_cpu_sse_test # try again
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verify_cpu_no_longmode:
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popfl # Restore caller passed flags
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movl $1,%eax
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ret
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verify_cpu_sse_ok:
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popfl # Restore caller passed flags
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xorl %eax, %eax
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ret
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