b67cf2848a
This patch adds board specific r-standby resume code for ms7724se. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
132 lines
3.1 KiB
ArmAsm
132 lines
3.1 KiB
ArmAsm
/*
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* MS7724SE sdram self/auto-refresh setup code
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*
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* Copyright (C) 2009 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/sys.h>
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#include <linux/errno.h>
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/suspend.h>
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#include <asm/romimage-macros.h>
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/* code to enter and leave self-refresh. must be self-contained.
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* this code will be copied to on-chip memory and executed from there.
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*/
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.balign 4
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ENTRY(ms7724se_sdram_enter_start)
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/* DBSC: put memory in self-refresh mode */
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ED 0xFD000010, 0x00000000 /* DBEN */
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ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
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ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
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ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
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ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
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rts
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nop
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ENTRY(ms7724se_sdram_enter_end)
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.balign 4
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ENTRY(ms7724se_sdram_leave_start)
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/* DBSC: put memory in auto-refresh mode */
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mov.l @(SH_SLEEP_MODE, r5), r0
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tst #SUSP_SH_RSTANDBY, r0
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bf resume_rstandby
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ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
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WAIT 1
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ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
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ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
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ED 0xFD000010, 0x00000001 /* DBEN */
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ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
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rts
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nop
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resume_rstandby:
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/* CPG: setup clocks before restarting external memory */
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ED 0xA4150024, 0x00004000 /* PLLCR */
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mov.l FRQCRA,r0
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mov.l @r0,r3
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mov.l KICK,r1
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or r1, r3
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mov.l r3, @r0
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mov.l LSTATS,r0
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mov #1,r1
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WAIT_LSTATS:
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mov.l @r0,r3
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tst r1,r3
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bf WAIT_LSTATS
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/* DBSC: re-initialize and put in auto-refresh */
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ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
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ED 0xFD000020, 0x015B0002 /* DBCONF */
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ED 0xFD000030, 0x03071502 /* DBTR0 */
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ED 0xFD000034, 0x02020102 /* DBTR1 */
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ED 0xFD000038, 0x01090405 /* DBTR2 */
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ED 0xFD00003C, 0x00000002 /* DBTR3 */
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ED 0xFD000008, 0x00000005 /* DBKIND */
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ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
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ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
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ED 0xFD000018, 0x00000001 /* DBCKECNT */
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mov #100,r0
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WAIT_400NS:
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dt r0
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bf WAIT_400NS
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ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
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ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
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ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
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ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
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ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
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ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
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ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
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ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
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ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
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ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
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ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
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mov #100,r0
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WAIT_400NS_2:
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dt r0
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bf WAIT_400NS_2
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ED 0xFD000010, 0x00000001 /* DBEN */
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ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
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ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
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mov.l DUMMY,r0
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mov.l @r0, r1 /* force single dummy read */
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ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
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ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
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ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
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ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
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rts
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nop
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.balign 4
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DUMMY: .long 0xac400000
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FRQCRA: .long 0xa4150000
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KICK: .long 0x80000000
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LSTATS: .long 0xa4150060
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ENTRY(ms7724se_sdram_leave_end)
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