6a3719562b
This patch adds support for RS1 memory map based Versatile Express motherboard. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
73 lines
2.0 KiB
C
73 lines
2.0 KiB
C
/*
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* arch/arm/mach-vexpress/include/mach/uncompress.h
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*
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* Copyright (C) 2003 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
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#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
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#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
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#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
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#define UART_BASE 0x10009000
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#define UART_BASE_RS1 0x1c090000
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static unsigned long get_uart_base(void)
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{
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unsigned long mpcore_periph;
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/*
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* Make an educated guess regarding the memory map:
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* - the original A9 core tile, which has MPCore peripherals
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* located at 0x1e000000, should use UART at 0x10009000
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* - all other (RS1 complaint) tiles use UART mapped
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* at 0x1c090000
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*/
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (mpcore_periph));
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if (mpcore_periph == 0x1e000000)
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return UART_BASE;
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else
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return UART_BASE_RS1;
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}
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/*
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* This does not append a newline
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*/
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static inline void putc(int c)
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{
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unsigned long base = get_uart_base();
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while (AMBA_UART_FR(base) & (1 << 5))
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barrier();
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AMBA_UART_DR(base) = c;
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}
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static inline void flush(void)
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{
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unsigned long base = get_uart_base();
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while (AMBA_UART_FR(base) & (1 << 3))
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barrier();
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}
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/*
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* nothing to do
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*/
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#define arch_decomp_setup()
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#define arch_decomp_wdog()
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