9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
24 lines
589 B
C
24 lines
589 B
C
/*
|
|
* include/asm-xtensa/shmparam.h
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU General
|
|
* Public License. See the file "COPYING" in the main directory of
|
|
* this archive for more details.
|
|
*/
|
|
|
|
#ifndef _XTENSA_SHMPARAM_H
|
|
#define _XTENSA_SHMPARAM_H
|
|
|
|
#include <asm/processor.h>
|
|
|
|
/*
|
|
* Xtensa can have variable size caches, and if
|
|
* the size of single way is larger than the page size,
|
|
* then we have to start worrying about cache aliasing
|
|
* problems.
|
|
*/
|
|
|
|
#define SHMLBA ((PAGE_SIZE > DCACHE_WAY_SIZE)? PAGE_SIZE : DCACHE_WAY_SIZE)
|
|
|
|
#endif /* _XTENSA_SHMPARAM_H */
|