1e9f28fa1e
Add a new sched domain for representing multi-core with shared caches between cores. Consider a dual package system, each package containing two cores and with last level cache shared between cores with in a package. If there are two runnable processes, with this appended patch those two processes will be scheduled on different packages. On such systems, with this patch we have observed 8% perf improvement with specJBB(2 warehouse) benchmark and 35% improvement with CFP2000 rate(with 2 users). This new domain will come into play only on multi-core systems with shared caches. On other systems, this sched domain will be removed by domain degeneration code. This new domain can be also used for implementing power savings policy (see OLS 2005 CMP kernel scheduler paper for more details.. I will post another patch for power savings policy soon) Most of the arch/* file changes are for cpu_coregroup_map() implementation. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
118 lines
3.3 KiB
C
118 lines
3.3 KiB
C
/*
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* linux/include/asm-i386/topology.h
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*
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* Written by: Matthew Dobson, IBM Corporation
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*
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* Copyright (C) 2002, IBM Corp.
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <colpatch@us.ibm.com>
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*/
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#ifndef _ASM_I386_TOPOLOGY_H
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#define _ASM_I386_TOPOLOGY_H
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#ifdef CONFIG_X86_HT
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#define topology_physical_package_id(cpu) \
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(phys_proc_id[cpu] == BAD_APICID ? -1 : phys_proc_id[cpu])
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#define topology_core_id(cpu) \
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(cpu_core_id[cpu] == BAD_APICID ? 0 : cpu_core_id[cpu])
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#define topology_core_siblings(cpu) (cpu_core_map[cpu])
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#define topology_thread_siblings(cpu) (cpu_sibling_map[cpu])
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#endif
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#ifdef CONFIG_NUMA
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#include <asm/mpspec.h>
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#include <linux/cpumask.h>
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/* Mappings between logical cpu number and node number */
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extern cpumask_t node_2_cpu_mask[];
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extern int cpu_2_node[];
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/* Returns the number of the node containing CPU 'cpu' */
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static inline int cpu_to_node(int cpu)
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{
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return cpu_2_node[cpu];
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}
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/* Returns the number of the node containing Node 'node'. This architecture is flat,
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so it is a pretty simple function! */
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#define parent_node(node) (node)
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/* Returns a bitmask of CPUs on Node 'node'. */
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static inline cpumask_t node_to_cpumask(int node)
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{
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return node_2_cpu_mask[node];
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}
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/* Returns the number of the first CPU on Node 'node'. */
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static inline int node_to_first_cpu(int node)
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{
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cpumask_t mask = node_to_cpumask(node);
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return first_cpu(mask);
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}
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#define pcibus_to_node(bus) ((long) (bus)->sysdata)
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#define pcibus_to_cpumask(bus) node_to_cpumask(pcibus_to_node(bus))
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/* sched_domains SD_NODE_INIT for NUMAQ machines */
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#define SD_NODE_INIT (struct sched_domain) { \
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.span = CPU_MASK_NONE, \
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.parent = NULL, \
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.groups = NULL, \
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.min_interval = 8, \
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.max_interval = 32, \
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.busy_factor = 32, \
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.imbalance_pct = 125, \
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.cache_nice_tries = 1, \
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.busy_idx = 3, \
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.idle_idx = 1, \
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.newidle_idx = 2, \
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.wake_idx = 1, \
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.per_cpu_gain = 100, \
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.flags = SD_LOAD_BALANCE \
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| SD_BALANCE_EXEC \
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| SD_BALANCE_FORK \
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| SD_WAKE_BALANCE, \
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.last_balance = jiffies, \
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.balance_interval = 1, \
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.nr_balance_failed = 0, \
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}
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extern unsigned long node_start_pfn[];
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extern unsigned long node_end_pfn[];
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extern unsigned long node_remap_size[];
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#define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
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#else /* !CONFIG_NUMA */
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/*
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* Other i386 platforms should define their own version of the
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* above macros here.
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*/
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#include <asm-generic/topology.h>
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#endif /* CONFIG_NUMA */
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extern cpumask_t cpu_coregroup_map(int cpu);
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#endif /* _ASM_I386_TOPOLOGY_H */
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