1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
585 lines
13 KiB
C
585 lines
13 KiB
C
/*
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* Common tx4927 irq handler
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*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/module.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/timex.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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#include <linux/irq.h>
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#include <linux/bitops.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mipsregs.h>
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#include <asm/system.h>
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#include <asm/tx4927/tx4927.h>
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/*
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* DEBUG
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*/
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#undef TX4927_IRQ_DEBUG
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#ifdef TX4927_IRQ_DEBUG
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#define TX4927_IRQ_NONE 0x00000000
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#define TX4927_IRQ_INFO ( 1 << 0 )
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#define TX4927_IRQ_WARN ( 1 << 1 )
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#define TX4927_IRQ_EROR ( 1 << 2 )
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#define TX4927_IRQ_INIT ( 1 << 5 )
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#define TX4927_IRQ_NEST1 ( 1 << 6 )
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#define TX4927_IRQ_NEST2 ( 1 << 7 )
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#define TX4927_IRQ_NEST3 ( 1 << 8 )
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#define TX4927_IRQ_NEST4 ( 1 << 9 )
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#define TX4927_IRQ_CP0_INIT ( 1 << 10 )
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#define TX4927_IRQ_CP0_STARTUP ( 1 << 11 )
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#define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 )
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#define TX4927_IRQ_CP0_ENABLE ( 1 << 13 )
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#define TX4927_IRQ_CP0_DISABLE ( 1 << 14 )
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#define TX4927_IRQ_CP0_MASK ( 1 << 15 )
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#define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 )
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#define TX4927_IRQ_PIC_INIT ( 1 << 20 )
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#define TX4927_IRQ_PIC_STARTUP ( 1 << 21 )
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#define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 )
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#define TX4927_IRQ_PIC_ENABLE ( 1 << 23 )
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#define TX4927_IRQ_PIC_DISABLE ( 1 << 24 )
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#define TX4927_IRQ_PIC_MASK ( 1 << 25 )
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#define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 )
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#define TX4927_IRQ_ALL 0xffffffff
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#endif
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#ifdef TX4927_IRQ_DEBUG
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static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
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| TX4927_IRQ_INFO
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| TX4927_IRQ_WARN | TX4927_IRQ_EROR
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// | TX4927_IRQ_CP0_INIT
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// | TX4927_IRQ_CP0_STARTUP
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// | TX4927_IRQ_CP0_SHUTDOWN
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// | TX4927_IRQ_CP0_ENABLE
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// | TX4927_IRQ_CP0_DISABLE
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// | TX4927_IRQ_CP0_MASK
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// | TX4927_IRQ_CP0_ENDIRQ
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// | TX4927_IRQ_PIC_INIT
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// | TX4927_IRQ_PIC_STARTUP
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// | TX4927_IRQ_PIC_SHUTDOWN
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// | TX4927_IRQ_PIC_ENABLE
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// | TX4927_IRQ_PIC_DISABLE
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// | TX4927_IRQ_PIC_MASK
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// | TX4927_IRQ_PIC_ENDIRQ
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// | TX4927_IRQ_INIT
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// | TX4927_IRQ_NEST1
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// | TX4927_IRQ_NEST2
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// | TX4927_IRQ_NEST3
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// | TX4927_IRQ_NEST4
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);
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#endif
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#ifdef TX4927_IRQ_DEBUG
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#define TX4927_IRQ_DPRINTK(flag,str...) \
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if ( (tx4927_irq_debug_flag) & (flag) ) \
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{ \
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char tmp[100]; \
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sprintf( tmp, str ); \
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printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
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}
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#else
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#define TX4927_IRQ_DPRINTK(flag,str...)
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#endif
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/*
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* Forwad definitions for all pic's
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*/
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static unsigned int tx4927_irq_cp0_startup(unsigned int irq);
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static void tx4927_irq_cp0_shutdown(unsigned int irq);
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static void tx4927_irq_cp0_enable(unsigned int irq);
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static void tx4927_irq_cp0_disable(unsigned int irq);
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static void tx4927_irq_cp0_mask_and_ack(unsigned int irq);
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static void tx4927_irq_cp0_end(unsigned int irq);
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static unsigned int tx4927_irq_pic_startup(unsigned int irq);
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static void tx4927_irq_pic_shutdown(unsigned int irq);
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static void tx4927_irq_pic_enable(unsigned int irq);
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static void tx4927_irq_pic_disable(unsigned int irq);
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static void tx4927_irq_pic_mask_and_ack(unsigned int irq);
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static void tx4927_irq_pic_end(unsigned int irq);
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/*
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* Kernel structs for all pic's
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*/
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static DEFINE_SPINLOCK(tx4927_cp0_lock);
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static DEFINE_SPINLOCK(tx4927_pic_lock);
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#define TX4927_CP0_NAME "TX4927-CP0"
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static struct hw_interrupt_type tx4927_irq_cp0_type = {
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.typename = TX4927_CP0_NAME,
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.startup = tx4927_irq_cp0_startup,
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.shutdown = tx4927_irq_cp0_shutdown,
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.enable = tx4927_irq_cp0_enable,
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.disable = tx4927_irq_cp0_disable,
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.ack = tx4927_irq_cp0_mask_and_ack,
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.end = tx4927_irq_cp0_end,
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.set_affinity = NULL
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};
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#define TX4927_PIC_NAME "TX4927-PIC"
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static struct hw_interrupt_type tx4927_irq_pic_type = {
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.typename = TX4927_PIC_NAME,
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.startup = tx4927_irq_pic_startup,
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.shutdown = tx4927_irq_pic_shutdown,
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.enable = tx4927_irq_pic_enable,
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.disable = tx4927_irq_pic_disable,
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.ack = tx4927_irq_pic_mask_and_ack,
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.end = tx4927_irq_pic_end,
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.set_affinity = NULL
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};
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#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
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static struct irqaction tx4927_irq_pic_action =
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TX4927_PIC_ACTION(TX4927_PIC_NAME);
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#define CCP0_STATUS 12
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#define CCP0_CAUSE 13
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/*
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* Functions for cp0
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*/
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#define tx4927_irq_cp0_mask(irq) ( 1 << ( irq-TX4927_IRQ_CP0_BEG+8 ) )
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static void
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tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits)
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{
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unsigned long val = 0;
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switch (cp0_reg) {
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case CCP0_STATUS:
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val = read_c0_status();
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break;
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case CCP0_CAUSE:
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val = read_c0_cause();
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break;
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}
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val &= (~clr_bits);
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val |= (set_bits);
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switch (cp0_reg) {
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case CCP0_STATUS:{
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write_c0_status(val);
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break;
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}
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case CCP0_CAUSE:{
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write_c0_cause(val);
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break;
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}
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}
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return;
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}
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static void __init tx4927_irq_cp0_init(void)
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{
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int i;
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n",
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TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END);
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for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 1;
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irq_desc[i].handler = &tx4927_irq_cp0_type;
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}
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return;
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}
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static unsigned int tx4927_irq_cp0_startup(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq);
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tx4927_irq_cp0_enable(irq);
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return (0);
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}
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static void tx4927_irq_cp0_shutdown(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq);
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tx4927_irq_cp0_disable(irq);
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return;
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}
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static void tx4927_irq_cp0_enable(unsigned int irq)
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{
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unsigned long flags;
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
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spin_lock_irqsave(&tx4927_cp0_lock, flags);
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tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
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spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
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return;
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}
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static void tx4927_irq_cp0_disable(unsigned int irq)
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{
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unsigned long flags;
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
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spin_lock_irqsave(&tx4927_cp0_lock, flags);
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tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
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spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
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return;
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}
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static void tx4927_irq_cp0_mask_and_ack(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq);
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tx4927_irq_cp0_disable(irq);
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return;
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}
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static void tx4927_irq_cp0_end(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
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tx4927_irq_cp0_enable(irq);
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}
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return;
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}
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/*
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* Functions for pic
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*/
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u32 tx4927_irq_pic_addr(int irq)
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{
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/* MVMCP -- need to formulize this */
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irq -= TX4927_IRQ_PIC_BEG;
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switch (irq) {
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case 17:
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case 16:
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case 1:
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case 0:
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return (0xff1ff610);
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case 19:
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case 18:
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case 3:
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case 2:
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return (0xff1ff614);
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case 21:
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case 20:
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case 5:
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case 4:
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return (0xff1ff618);
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case 23:
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case 22:
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case 7:
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case 6:
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return (0xff1ff61c);
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case 25:
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case 24:
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case 9:
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case 8:
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return (0xff1ff620);
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case 27:
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case 26:
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case 11:
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case 10:
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return (0xff1ff624);
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case 29:
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case 28:
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case 13:
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case 12:
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return (0xff1ff628);
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case 31:
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case 30:
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case 15:
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case 14:
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return (0xff1ff62c);
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}
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return (0);
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}
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u32 tx4927_irq_pic_mask(int irq)
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{
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/* MVMCP -- need to formulize this */
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irq -= TX4927_IRQ_PIC_BEG;
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switch (irq) {
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case 31:
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case 29:
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case 27:
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case 25:
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case 23:
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case 21:
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case 19:
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case 17:{
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return (0x07000000);
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}
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case 30:
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case 28:
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case 26:
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case 24:
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case 22:
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case 20:
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case 18:
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case 16:{
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return (0x00070000);
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}
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case 15:
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case 13:
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case 11:
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case 9:
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case 7:
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case 5:
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case 3:
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case 1:{
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return (0x00000700);
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}
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case 14:
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case 12:
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case 10:
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case 8:
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case 6:
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case 4:
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case 2:
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case 0:{
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return (0x00000007);
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}
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}
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return (0x00000000);
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}
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static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits,
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unsigned set_bits)
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{
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unsigned long val = 0;
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val = TX4927_RD(pic_reg);
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val &= (~clr_bits);
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val |= (set_bits);
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TX4927_WR(pic_reg, val);
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return;
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}
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static void __init tx4927_irq_pic_init(void)
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{
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unsigned long flags;
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int i;
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n",
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TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END);
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for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) {
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irq_desc[i].status = IRQ_DISABLED;
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irq_desc[i].action = 0;
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irq_desc[i].depth = 2;
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irq_desc[i].handler = &tx4927_irq_pic_type;
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}
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setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
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spin_lock_irqsave(&tx4927_pic_lock, flags);
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TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */
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TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */
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spin_unlock_irqrestore(&tx4927_pic_lock, flags);
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return;
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}
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static unsigned int tx4927_irq_pic_startup(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq);
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tx4927_irq_pic_enable(irq);
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return (0);
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}
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static void tx4927_irq_pic_shutdown(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq);
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tx4927_irq_pic_disable(irq);
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return;
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}
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static void tx4927_irq_pic_enable(unsigned int irq)
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{
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unsigned long flags;
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
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spin_lock_irqsave(&tx4927_pic_lock, flags);
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tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
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tx4927_irq_pic_mask(irq));
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spin_unlock_irqrestore(&tx4927_pic_lock, flags);
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return;
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}
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static void tx4927_irq_pic_disable(unsigned int irq)
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{
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unsigned long flags;
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
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spin_lock_irqsave(&tx4927_pic_lock, flags);
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tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
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tx4927_irq_pic_mask(irq), 0);
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spin_unlock_irqrestore(&tx4927_pic_lock, flags);
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return;
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}
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static void tx4927_irq_pic_mask_and_ack(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq);
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tx4927_irq_pic_disable(irq);
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return;
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}
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static void tx4927_irq_pic_end(unsigned int irq)
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{
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TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
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if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
|
|
tx4927_irq_pic_enable(irq);
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Main init functions
|
|
*/
|
|
void __init tx4927_irq_init(void)
|
|
{
|
|
extern asmlinkage void tx4927_irq_handler(void);
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "-\n");
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_cp0_init()\n");
|
|
tx4927_irq_cp0_init();
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "=Calling tx4927_irq_pic_init()\n");
|
|
tx4927_irq_pic_init();
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT,
|
|
"=Calling set_except_vector(tx4927_irq_handler)\n");
|
|
set_except_vector(0, tx4927_irq_handler);
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n");
|
|
|
|
return;
|
|
}
|
|
|
|
int tx4927_irq_nested(void)
|
|
{
|
|
int sw_irq = 0;
|
|
u32 level2;
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "-\n");
|
|
|
|
level2 = TX4927_RD(0xff1ff6a0);
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=level2a=0x%x\n", level2);
|
|
|
|
if ((level2 & 0x10000) == 0) {
|
|
level2 &= 0x1f;
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=level2b=0x%x\n", level2);
|
|
|
|
sw_irq = TX4927_IRQ_PIC_BEG + level2;
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST3, "=sw_irq=%d\n", sw_irq);
|
|
|
|
if (sw_irq == 27) {
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq-%d\n",
|
|
sw_irq);
|
|
|
|
#ifdef CONFIG_TOSHIBA_RBTX4927
|
|
{
|
|
sw_irq = toshiba_rbtx4927_irq_nested(sw_irq);
|
|
}
|
|
#endif
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST4, "=irq+%d\n",
|
|
sw_irq);
|
|
}
|
|
}
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST2, "=sw_irq=%d\n", sw_irq);
|
|
|
|
TX4927_IRQ_DPRINTK(TX4927_IRQ_NEST1, "+\n");
|
|
|
|
return (sw_irq);
|
|
}
|