71fc5099ed
PLL1 and PLL2 in the sh73a0 CPGA has a CFG bit that must be taken into account to correctly calculate the frequency. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
||
---|---|---|
.. | ||
include/mach | ||
board-ag5evm.c | ||
board-ap4evb.c | ||
board-g3evm.c | ||
board-g4evm.c | ||
board-mackerel.c | ||
clock-sh73a0.c | ||
clock-sh7367.c | ||
clock-sh7372.c | ||
clock-sh7377.c | ||
clock.c | ||
console.c | ||
entry-gic.S | ||
entry-intc.S | ||
headsmp.S | ||
hotplug.c | ||
intc-sh73a0.c | ||
intc-sh7367.c | ||
intc-sh7372.c | ||
intc-sh7377.c | ||
Kconfig | ||
localtimer.c | ||
Makefile | ||
Makefile.boot | ||
pfc-sh73a0.c | ||
pfc-sh7367.c | ||
pfc-sh7372.c | ||
pfc-sh7377.c | ||
platsmp.c | ||
pm_runtime.c | ||
setup-sh73a0.c | ||
setup-sh7367.c | ||
setup-sh7372.c | ||
setup-sh7377.c | ||
smp-sh73a0.c | ||
timer.c |