6beb000923
commit 892a7c67
(locking: Allow arch-inlined spinlocks) implements the
selection of which lock functions are inlined based on defines in
arch/.../spinlock.h: #define __always_inline__LOCK_FUNCTION
Despite of the name __always_inline__* the lock functions can be built
out of line depending on config options. Also if the arch does not set
some inline defines the generic code might set them; again depending on
config options.
This makes it unnecessary hard to figure out when and which lock
functions are inlined. Aside of that it makes it way harder and
messier for -rt to manipulate the lock functions.
Convert the inlining decision to CONFIG switches. Each lock function
is inlined depending on CONFIG_INLINE_*. The configs implement the
existing dependencies. The architecture code can select ARCH_INLINE_*
to signal that it wants the corresponding lock function inlined.
ARCH_INLINE_* is necessary as Kconfig ignores "depends on"
restrictions when a config element is selected.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
LKML-Reference: <20091109151428.504477141@linutronix.de>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
195 lines
4.9 KiB
C
195 lines
4.9 KiB
C
/*
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* include/asm-s390/spinlock.h
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*
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* S390 version
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* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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*
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* Derived from "include/asm-i386/spinlock.h"
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*/
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#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#include <linux/smp.h>
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#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
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static inline int
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_raw_compare_and_swap(volatile unsigned int *lock,
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unsigned int old, unsigned int new)
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{
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asm volatile(
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" cs %0,%3,%1"
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: "=d" (old), "=Q" (*lock)
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: "0" (old), "d" (new), "Q" (*lock)
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: "cc", "memory" );
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return old;
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}
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#else /* __GNUC__ */
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static inline int
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_raw_compare_and_swap(volatile unsigned int *lock,
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unsigned int old, unsigned int new)
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{
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asm volatile(
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" cs %0,%3,0(%4)"
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: "=d" (old), "=m" (*lock)
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: "0" (old), "d" (new), "a" (lock), "m" (*lock)
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: "cc", "memory" );
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return old;
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}
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#endif /* __GNUC__ */
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/*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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* on the local processor, one does not.
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*
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* We make no fairness assumptions. They have a cost.
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*
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* (the type definitions are in asm/spinlock_types.h)
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*/
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#define __raw_spin_is_locked(x) ((x)->owner_cpu != 0)
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#define __raw_spin_unlock_wait(lock) \
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do { while (__raw_spin_is_locked(lock)) \
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_raw_spin_relax(lock); } while (0)
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extern void _raw_spin_lock_wait(raw_spinlock_t *);
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extern void _raw_spin_lock_wait_flags(raw_spinlock_t *, unsigned long flags);
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extern int _raw_spin_trylock_retry(raw_spinlock_t *);
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extern void _raw_spin_relax(raw_spinlock_t *lock);
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static inline void __raw_spin_lock(raw_spinlock_t *lp)
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{
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int old;
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old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
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if (likely(old == 0))
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return;
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_raw_spin_lock_wait(lp);
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}
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static inline void __raw_spin_lock_flags(raw_spinlock_t *lp,
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unsigned long flags)
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{
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int old;
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old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
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if (likely(old == 0))
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return;
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_raw_spin_lock_wait_flags(lp, flags);
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}
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static inline int __raw_spin_trylock(raw_spinlock_t *lp)
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{
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int old;
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old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
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if (likely(old == 0))
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return 1;
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return _raw_spin_trylock_retry(lp);
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}
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static inline void __raw_spin_unlock(raw_spinlock_t *lp)
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{
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_raw_compare_and_swap(&lp->owner_cpu, lp->owner_cpu, 0);
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}
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/*
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* Read-write spinlocks, allowing multiple readers
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* but only one writer.
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*
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* NOTE! it is quite common to have readers in interrupts
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* but no interrupt writers. For those circumstances we
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* can "mix" irq-safe locks - any writer needs to get a
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* irq-safe write-lock, but readers can get non-irqsafe
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* read-locks.
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*/
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/**
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* read_can_lock - would read_trylock() succeed?
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* @lock: the rwlock in question.
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*/
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#define __raw_read_can_lock(x) ((int)(x)->lock >= 0)
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/**
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* write_can_lock - would write_trylock() succeed?
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* @lock: the rwlock in question.
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*/
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#define __raw_write_can_lock(x) ((x)->lock == 0)
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extern void _raw_read_lock_wait(raw_rwlock_t *lp);
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extern void _raw_read_lock_wait_flags(raw_rwlock_t *lp, unsigned long flags);
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extern int _raw_read_trylock_retry(raw_rwlock_t *lp);
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extern void _raw_write_lock_wait(raw_rwlock_t *lp);
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extern void _raw_write_lock_wait_flags(raw_rwlock_t *lp, unsigned long flags);
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extern int _raw_write_trylock_retry(raw_rwlock_t *lp);
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static inline void __raw_read_lock(raw_rwlock_t *rw)
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{
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unsigned int old;
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old = rw->lock & 0x7fffffffU;
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if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
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_raw_read_lock_wait(rw);
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}
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static inline void __raw_read_lock_flags(raw_rwlock_t *rw, unsigned long flags)
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{
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unsigned int old;
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old = rw->lock & 0x7fffffffU;
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if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
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_raw_read_lock_wait_flags(rw, flags);
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}
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static inline void __raw_read_unlock(raw_rwlock_t *rw)
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{
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unsigned int old, cmp;
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old = rw->lock;
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do {
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cmp = old;
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old = _raw_compare_and_swap(&rw->lock, old, old - 1);
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} while (cmp != old);
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}
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static inline void __raw_write_lock(raw_rwlock_t *rw)
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{
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if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
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_raw_write_lock_wait(rw);
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}
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static inline void __raw_write_lock_flags(raw_rwlock_t *rw, unsigned long flags)
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{
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if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
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_raw_write_lock_wait_flags(rw, flags);
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}
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static inline void __raw_write_unlock(raw_rwlock_t *rw)
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{
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_raw_compare_and_swap(&rw->lock, 0x80000000, 0);
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}
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static inline int __raw_read_trylock(raw_rwlock_t *rw)
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{
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unsigned int old;
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old = rw->lock & 0x7fffffffU;
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if (likely(_raw_compare_and_swap(&rw->lock, old, old + 1) == old))
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return 1;
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return _raw_read_trylock_retry(rw);
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}
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static inline int __raw_write_trylock(raw_rwlock_t *rw)
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{
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if (likely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0))
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return 1;
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return _raw_write_trylock_retry(rw);
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}
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#define _raw_read_relax(lock) cpu_relax()
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#define _raw_write_relax(lock) cpu_relax()
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#endif /* __ASM_SPINLOCK_H */
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