fc095a9021
The following change updates the Atlas interrupt handling to match that of Malta. Tested with a 5Kc and a 34Kf successfully. Signed-off-by: Maciej W. Rozycki <macro@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
92 lines
2.9 KiB
C
92 lines
2.9 KiB
C
/*
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* Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
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* Author: Maciej W. Rozycki <macro@mips.com>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/mips-boards/atlasint.h>
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#define PCIA ATLAS_INT_PCIA
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#define PCIB ATLAS_INT_PCIB
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#define PCIC ATLAS_INT_PCIC
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#define PCID ATLAS_INT_PCID
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#define INTA ATLAS_INT_INTA
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#define INTB ATLAS_INT_INTB
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#define ETH ATLAS_INT_ETH
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#define INTC ATLAS_INT_INTC
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#define SCSI ATLAS_INT_SCSI
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#define INTD ATLAS_INT_INTD
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static char irq_tab[][5] __initdata = {
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/* INTA INTB INTC INTD */
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{0, 0, 0, 0, 0 }, /* 0: Unused */
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{0, 0, 0, 0, 0 }, /* 1: Unused */
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{0, 0, 0, 0, 0 }, /* 2: Unused */
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{0, 0, 0, 0, 0 }, /* 3: Unused */
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{0, 0, 0, 0, 0 }, /* 4: Unused */
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{0, 0, 0, 0, 0 }, /* 5: Unused */
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{0, 0, 0, 0, 0 }, /* 6: Unused */
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{0, 0, 0, 0, 0 }, /* 7: Unused */
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{0, 0, 0, 0, 0 }, /* 8: Unused */
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{0, 0, 0, 0, 0 }, /* 9: Unused */
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{0, 0, 0, 0, 0 }, /* 10: Unused */
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{0, 0, 0, 0, 0 }, /* 11: Unused */
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{0, 0, 0, 0, 0 }, /* 12: Unused */
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{0, 0, 0, 0, 0 }, /* 13: Unused */
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{0, 0, 0, 0, 0 }, /* 14: Unused */
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{0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
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{0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
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{0, 0, 0, 0, 0 }, /* 17: Core */
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{0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
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{0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
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{0, 0, 0, 0, 0 }, /* 20: Unused */
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{0, 0, 0, 0, 0 } /* 21: Unused */
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};
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int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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return irq_tab[slot][pin];
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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#ifdef CONFIG_KGDB
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/*
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* The PCI scan may have moved the saa9730 I/O address, so reread
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* the address here.
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* This does mean that it's not possible to debug the PCI bus configuration
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* code, but it is better than nothing...
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*/
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static void atlas_saa9730_base_fixup (struct pci_dev *pdev)
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{
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extern void *saa9730_base;
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if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
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(void) pci_read_config_dword (pdev, 0x14, (u32 *)&saa9730_base);
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printk ("saa9730_base = %x\n", saa9730_base);
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
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atlas_saa9730_base_fixup);
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#endif
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