0fb2a6f283
Added support gor dma_direct_sync_single_for_*() and dma_direct_sync_sg_for_*() Signed-off-by: Eli Billauer <eli.billauer@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
202 lines
5.2 KiB
C
202 lines
5.2 KiB
C
/*
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* Copyright (C) 2009-2010 PetaLogix
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* Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
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*
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* Provide default implementations of the DMA mapping callbacks for
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* directly mapped busses.
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/dma-debug.h>
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#include <asm/bug.h>
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/*
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* Generic direct DMA implementation
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*
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* This implementation supports a per-device offset that can be applied if
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* the address at which memory is visible to devices is not 0. Platform code
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* can set archdata.dma_data to an unsigned long holding the offset. By
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* default the offset is PCI_DRAM_OFFSET.
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*/
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static unsigned long get_dma_direct_offset(struct device *dev)
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{
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if (likely(dev))
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return (unsigned long)dev->archdata.dma_data;
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return PCI_DRAM_OFFSET; /* FIXME Not sure if is correct */
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}
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#define NOT_COHERENT_CACHE
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static void *dma_direct_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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#ifdef NOT_COHERENT_CACHE
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return consistent_alloc(flag, size, dma_handle);
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#else
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void *ret;
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struct page *page;
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int node = dev_to_node(dev);
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/* ignore region specifiers */
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flag &= ~(__GFP_HIGHMEM);
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page = alloc_pages_node(node, flag, get_order(size));
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if (page == NULL)
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return NULL;
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ret = page_address(page);
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memset(ret, 0, size);
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*dma_handle = virt_to_phys(ret) + get_dma_direct_offset(dev);
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return ret;
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#endif
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}
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static void dma_direct_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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#ifdef NOT_COHERENT_CACHE
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consistent_free(size, vaddr);
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#else
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free_pages((unsigned long)vaddr, get_order(size));
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#endif
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}
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static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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struct scatterlist *sg;
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int i;
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/* FIXME this part of code is untested */
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for_each_sg(sgl, sg, nents, i) {
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sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
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__dma_sync(page_to_phys(sg_page(sg)) + sg->offset,
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sg->length, direction);
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}
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return nents;
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}
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static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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}
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static int dma_direct_dma_supported(struct device *dev, u64 mask)
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{
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return 1;
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}
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static inline dma_addr_t dma_direct_map_page(struct device *dev,
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struct page *page,
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unsigned long offset,
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size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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__dma_sync(page_to_phys(page) + offset, size, direction);
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return page_to_phys(page) + offset + get_dma_direct_offset(dev);
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}
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static inline void dma_direct_unmap_page(struct device *dev,
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dma_addr_t dma_address,
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size_t size,
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enum dma_data_direction direction,
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struct dma_attrs *attrs)
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{
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/* There is not necessary to do cache cleanup
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*
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* phys_to_virt is here because in __dma_sync_page is __virt_to_phys and
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* dma_address is physical address
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*/
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__dma_sync(dma_address, size, direction);
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}
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static inline void
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dma_direct_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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/*
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* It's pointless to flush the cache as the memory segment
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* is given to the CPU
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*/
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if (direction == DMA_FROM_DEVICE)
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__dma_sync(dma_handle, size, direction);
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}
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static inline void
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dma_direct_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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/*
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* It's pointless to invalidate the cache if the device isn't
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* supposed to write to the relevant region
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*/
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if (direction == DMA_TO_DEVICE)
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__dma_sync(dma_handle, size, direction);
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}
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static inline void
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dma_direct_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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/* FIXME this part of code is untested */
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if (direction == DMA_FROM_DEVICE)
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for_each_sg(sgl, sg, nents, i)
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__dma_sync(sg->dma_address, sg->length, direction);
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}
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static inline void
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dma_direct_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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/* FIXME this part of code is untested */
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if (direction == DMA_TO_DEVICE)
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for_each_sg(sgl, sg, nents, i)
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__dma_sync(sg->dma_address, sg->length, direction);
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}
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struct dma_map_ops dma_direct_ops = {
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.alloc_coherent = dma_direct_alloc_coherent,
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.free_coherent = dma_direct_free_coherent,
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.map_sg = dma_direct_map_sg,
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.unmap_sg = dma_direct_unmap_sg,
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.dma_supported = dma_direct_dma_supported,
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.map_page = dma_direct_map_page,
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.unmap_page = dma_direct_unmap_page,
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.sync_single_for_cpu = dma_direct_sync_single_for_cpu,
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.sync_single_for_device = dma_direct_sync_single_for_device,
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.sync_sg_for_cpu = dma_direct_sync_sg_for_cpu,
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.sync_sg_for_device = dma_direct_sync_sg_for_device,
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};
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EXPORT_SYMBOL(dma_direct_ops);
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/* Number of entries preallocated for DMA-API debugging */
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#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
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static int __init dma_init(void)
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{
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dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
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return 0;
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}
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fs_initcall(dma_init);
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