a9c037832e
commit 4814ced511
(OMAP:
control: move plat-omap/control.h to mach-omap2/control.h)
moved <plat/control.h> to another location, preventing
drivers from accessing it, so we need to pass function
pointers from arch code to be able to talk to internal
PHY on AM35x.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
224 lines
5.7 KiB
C
224 lines
5.7 KiB
C
/*
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* linux/arch/arm/mach-omap2/usb-musb.c
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*
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* This file will contain the board specific details for the
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* MENTOR USB OTG controller on OMAP3430
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*
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* Copyright (C) 2007-2008 Texas Instruments
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* Copyright (C) 2008 Nokia Corporation
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* Author: Vikram Pandita
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*
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* Generalization by:
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* Felipe Balbi <felipe.balbi@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/usb/musb.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/am35xx.h>
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#include <plat/usb.h>
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#include "control.h"
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#if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X)
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static void am35x_musb_reset(void)
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{
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u32 regval;
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/* Reset the musb interface */
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regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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regval |= AM35XX_USBOTGSS_SW_RST;
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omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
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regval &= ~AM35XX_USBOTGSS_SW_RST;
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omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
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regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
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}
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static void am35x_musb_phy_power(u8 on)
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{
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unsigned long timeout = jiffies + msecs_to_jiffies(100);
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u32 devconf2;
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if (on) {
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/*
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* Start the on-chip PHY and its PLL.
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*/
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devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
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devconf2 |= CONF2_PHY_PLLON;
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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pr_info(KERN_INFO "Waiting for PHY clock good...\n");
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while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
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& CONF2_PHYCLKGD)) {
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cpu_relax();
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if (time_after(jiffies, timeout)) {
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pr_err(KERN_ERR "musb PHY clock good timed out\n");
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break;
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}
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}
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} else {
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/*
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* Power down the on-chip PHY.
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*/
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devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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devconf2 &= ~CONF2_PHY_PLLON;
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devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN;
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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}
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}
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static void am35x_musb_clear_irq(void)
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{
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u32 regval;
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regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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regval |= AM35XX_USBOTGSS_INT_CLR;
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omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
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regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
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}
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static void am35x_musb_set_mode(u8 musb_mode)
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{
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u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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devconf2 &= ~CONF2_OTGMODE;
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switch (musb_mode) {
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#ifdef CONFIG_USB_MUSB_HDRC_HCD
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case MUSB_HOST: /* Force VBUS valid, ID = 0 */
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devconf2 |= CONF2_FORCE_HOST;
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break;
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#endif
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#ifdef CONFIG_USB_GADGET_MUSB_HDRC
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case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
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devconf2 |= CONF2_FORCE_DEVICE;
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break;
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#endif
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#ifdef CONFIG_USB_MUSB_OTG
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case MUSB_OTG: /* Don't override the VBUS/ID comparators */
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devconf2 |= CONF2_NO_OVERRIDE;
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break;
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#endif
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default:
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pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
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}
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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}
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static struct resource musb_resources[] = {
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[0] = { /* start and end set dynamically */
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.flags = IORESOURCE_MEM,
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},
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[1] = { /* general IRQ */
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.start = INT_243X_HS_USB_MC,
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.flags = IORESOURCE_IRQ,
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.name = "mc",
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},
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[2] = { /* DMA IRQ */
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.start = INT_243X_HS_USB_DMA,
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.flags = IORESOURCE_IRQ,
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.name = "dma",
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},
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};
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static struct musb_hdrc_config musb_config = {
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.multipoint = 1,
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.dyn_fifo = 1,
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.num_eps = 16,
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.ram_bits = 12,
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};
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static struct musb_hdrc_platform_data musb_plat = {
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#ifdef CONFIG_USB_MUSB_OTG
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.mode = MUSB_OTG,
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#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
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.mode = MUSB_HOST,
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#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
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.mode = MUSB_PERIPHERAL,
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#endif
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/* .clock is set dynamically */
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.config = &musb_config,
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/* REVISIT charge pump on TWL4030 can supply up to
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* 100 mA ... but this value is board-specific, like
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* "mode", and should be passed to usb_musb_init().
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*/
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.power = 50, /* up to 100 mA */
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};
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static u64 musb_dmamask = DMA_BIT_MASK(32);
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static struct platform_device musb_device = {
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.name = "musb-omap2430",
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.id = -1,
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.dev = {
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.dma_mask = &musb_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &musb_plat,
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},
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.num_resources = ARRAY_SIZE(musb_resources),
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.resource = musb_resources,
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};
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void __init usb_musb_init(struct omap_musb_board_data *board_data)
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{
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if (cpu_is_omap243x()) {
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musb_resources[0].start = OMAP243X_HS_BASE;
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} else if (cpu_is_omap3517() || cpu_is_omap3505()) {
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musb_device.name = "musb-am35x";
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musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
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musb_resources[1].start = INT_35XX_USBOTG_IRQ;
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board_data->set_phy_power = am35x_musb_phy_power;
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board_data->clear_irq = am35x_musb_clear_irq;
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board_data->set_mode = am35x_musb_set_mode;
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board_data->reset = am35x_musb_reset;
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} else if (cpu_is_omap34xx()) {
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musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
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} else if (cpu_is_omap44xx()) {
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musb_resources[0].start = OMAP44XX_HSUSB_OTG_BASE;
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musb_resources[1].start = OMAP44XX_IRQ_HS_USB_MC_N;
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musb_resources[2].start = OMAP44XX_IRQ_HS_USB_DMA_N;
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}
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musb_resources[0].end = musb_resources[0].start + SZ_4K - 1;
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/*
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* REVISIT: This line can be removed once all the platforms using
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* musb_core.c have been converted to use use clkdev.
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*/
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musb_plat.clock = "ick";
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musb_plat.board_data = board_data;
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musb_plat.power = board_data->power >> 1;
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musb_plat.mode = board_data->mode;
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musb_plat.extvbus = board_data->extvbus;
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if (platform_device_register(&musb_device) < 0)
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printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
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}
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#else
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void __init usb_musb_init(struct omap_musb_board_data *board_data)
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{
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}
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#endif /* CONFIG_USB_MUSB_SOC */
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