c430131a02
The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
342 lines
7.7 KiB
C
342 lines
7.7 KiB
C
/*
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* Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <linux/slab.h>
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#include <mach/mxc_ehci.h>
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#include <asm/mach-types.h>
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#define ULPI_VIEWPORT_OFFSET 0x170
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struct ehci_mxc_priv {
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struct clk *usbclk, *ahbclk, *phy1clk;
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struct usb_hcd *hcd;
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};
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/* called during probe() after chip reset completes */
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static int ehci_mxc_setup(struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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int retval;
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dbg_hcs_params(ehci, "reset");
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dbg_hcc_params(ehci, "reset");
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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hcd->has_tt = 1;
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retval = ehci_halt(ehci);
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if (retval)
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return retval;
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/* data structure init */
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retval = ehci_init(hcd);
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if (retval)
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return retval;
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ehci->sbrn = 0x20;
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ehci_reset(ehci);
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ehci_port_power(ehci, 0);
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return 0;
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}
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static const struct hc_driver ehci_mxc_hc_driver = {
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.description = hcd_name,
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.product_desc = "Freescale On-Chip EHCI Host Controller",
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.hcd_priv_size = sizeof(struct ehci_hcd),
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/*
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* generic hardware linkage
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*/
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.irq = ehci_irq,
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.flags = HCD_USB2 | HCD_MEMORY,
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/*
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* basic lifecycle operations
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*/
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.reset = ehci_mxc_setup,
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.start = ehci_run,
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.stop = ehci_stop,
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.shutdown = ehci_shutdown,
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/*
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* managing i/o requests and associated device resources
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*/
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.urb_enqueue = ehci_urb_enqueue,
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.urb_dequeue = ehci_urb_dequeue,
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.endpoint_disable = ehci_endpoint_disable,
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.endpoint_reset = ehci_endpoint_reset,
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/*
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* scheduling support
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*/
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.get_frame_number = ehci_get_frame,
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/*
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* root hub support
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*/
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.hub_status_data = ehci_hub_status_data,
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.hub_control = ehci_hub_control,
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.bus_suspend = ehci_bus_suspend,
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.bus_resume = ehci_bus_resume,
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.relinquish_port = ehci_relinquish_port,
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.port_handed_over = ehci_port_handed_over,
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.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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};
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static int ehci_mxc_drv_probe(struct platform_device *pdev)
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{
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struct mxc_usbh_platform_data *pdata = pdev->dev.platform_data;
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struct usb_hcd *hcd;
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struct resource *res;
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int irq, ret;
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unsigned int flags;
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struct ehci_mxc_priv *priv;
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struct device *dev = &pdev->dev;
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struct ehci_hcd *ehci;
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dev_info(&pdev->dev, "initializing i.MX USB Controller\n");
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if (!pdata) {
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dev_err(dev, "No platform data given, bailing out.\n");
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return -EINVAL;
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}
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irq = platform_get_irq(pdev, 0);
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hcd = usb_create_hcd(&ehci_mxc_hc_driver, dev, dev_name(dev));
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if (!hcd)
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return -ENOMEM;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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ret = -ENOMEM;
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goto err_alloc;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "Found HC with no register addr. Check setup!\n");
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ret = -ENODEV;
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goto err_get_resource;
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}
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hcd->rsrc_start = res->start;
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hcd->rsrc_len = resource_size(res);
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
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dev_dbg(dev, "controller already in use\n");
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ret = -EBUSY;
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goto err_request_mem;
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}
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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if (!hcd->regs) {
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dev_err(dev, "error mapping memory\n");
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ret = -EFAULT;
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goto err_ioremap;
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}
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/* enable clocks */
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priv->usbclk = clk_get(dev, "usb");
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if (IS_ERR(priv->usbclk)) {
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ret = PTR_ERR(priv->usbclk);
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goto err_clk;
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}
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clk_enable(priv->usbclk);
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if (!cpu_is_mx35() && !cpu_is_mx25()) {
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priv->ahbclk = clk_get(dev, "usb_ahb");
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if (IS_ERR(priv->ahbclk)) {
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ret = PTR_ERR(priv->ahbclk);
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goto err_clk_ahb;
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}
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clk_enable(priv->ahbclk);
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}
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/* "dr" device has its own clock on i.MX51 */
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if (cpu_is_mx51() && (pdev->id == 0)) {
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priv->phy1clk = clk_get(dev, "usb_phy1");
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if (IS_ERR(priv->phy1clk)) {
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ret = PTR_ERR(priv->phy1clk);
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goto err_clk_phy;
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}
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clk_enable(priv->phy1clk);
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}
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/* call platform specific init function */
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if (pdata->init) {
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ret = pdata->init(pdev);
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if (ret) {
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dev_err(dev, "platform init failed\n");
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goto err_init;
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}
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/* platforms need some time to settle changed IO settings */
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mdelay(10);
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}
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ehci = hcd_to_ehci(hcd);
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/* EHCI registers start at offset 0x100 */
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ehci->caps = hcd->regs + 0x100;
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ehci->regs = hcd->regs + 0x100 +
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HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
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/* set up the PORTSCx register */
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ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
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/* is this really needed? */
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msleep(10);
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/* Initialize the transceiver */
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if (pdata->otg) {
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pdata->otg->io_priv = hcd->regs + ULPI_VIEWPORT_OFFSET;
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ret = otg_init(pdata->otg);
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if (ret) {
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dev_err(dev, "unable to init transceiver, probably missing\n");
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ret = -ENODEV;
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goto err_add;
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}
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ret = otg_set_vbus(pdata->otg, 1);
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if (ret) {
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dev_err(dev, "unable to enable vbus on transceiver\n");
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goto err_add;
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}
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}
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priv->hcd = hcd;
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platform_set_drvdata(pdev, priv);
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ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
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if (ret)
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goto err_add;
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if (pdata->otg) {
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/*
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* efikamx and efikasb have some hardware bug which is
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* preventing usb to work unless CHRGVBUS is set.
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* It's in violation of USB specs
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*/
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if (machine_is_mx51_efikamx() || machine_is_mx51_efikasb()) {
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flags = otg_io_read(pdata->otg, ULPI_OTG_CTRL);
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flags |= ULPI_OTG_CTRL_CHRGVBUS;
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ret = otg_io_write(pdata->otg, flags, ULPI_OTG_CTRL);
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if (ret) {
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dev_err(dev, "unable to set CHRVBUS\n");
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goto err_add;
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}
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}
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}
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return 0;
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err_add:
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if (pdata && pdata->exit)
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pdata->exit(pdev);
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err_init:
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if (priv->phy1clk) {
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clk_disable(priv->phy1clk);
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clk_put(priv->phy1clk);
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}
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err_clk_phy:
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if (priv->ahbclk) {
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clk_disable(priv->ahbclk);
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clk_put(priv->ahbclk);
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}
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err_clk_ahb:
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clk_disable(priv->usbclk);
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clk_put(priv->usbclk);
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err_clk:
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iounmap(hcd->regs);
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err_ioremap:
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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err_request_mem:
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err_get_resource:
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kfree(priv);
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err_alloc:
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usb_put_hcd(hcd);
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return ret;
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}
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static int __exit ehci_mxc_drv_remove(struct platform_device *pdev)
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{
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struct mxc_usbh_platform_data *pdata = pdev->dev.platform_data;
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struct ehci_mxc_priv *priv = platform_get_drvdata(pdev);
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struct usb_hcd *hcd = priv->hcd;
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if (pdata && pdata->exit)
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pdata->exit(pdev);
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if (pdata->otg)
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otg_shutdown(pdata->otg);
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usb_remove_hcd(hcd);
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iounmap(hcd->regs);
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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usb_put_hcd(hcd);
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platform_set_drvdata(pdev, NULL);
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clk_disable(priv->usbclk);
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clk_put(priv->usbclk);
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if (priv->ahbclk) {
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clk_disable(priv->ahbclk);
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clk_put(priv->ahbclk);
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}
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if (priv->phy1clk) {
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clk_disable(priv->phy1clk);
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clk_put(priv->phy1clk);
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}
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kfree(priv);
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return 0;
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}
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static void ehci_mxc_drv_shutdown(struct platform_device *pdev)
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{
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struct ehci_mxc_priv *priv = platform_get_drvdata(pdev);
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struct usb_hcd *hcd = priv->hcd;
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if (hcd->driver->shutdown)
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hcd->driver->shutdown(hcd);
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}
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MODULE_ALIAS("platform:mxc-ehci");
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static struct platform_driver ehci_mxc_driver = {
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.probe = ehci_mxc_drv_probe,
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.remove = __exit_p(ehci_mxc_drv_remove),
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.shutdown = ehci_mxc_drv_shutdown,
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.driver = {
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.name = "mxc-ehci",
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},
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};
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