65846909d6
mcbsp is confused as to what takes a physical or virtual address. Fix the two instances where it gets it wrong. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
289 lines
7.0 KiB
C
289 lines
7.0 KiB
C
/*
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* linux/arch/arm/mach-omap1/mcbsp.c
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*
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* Copyright (C) 2008 Instituto Nokia de Tecnologia
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* Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Multichannel mode not supported.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <mach/dma.h>
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#include <mach/mux.h>
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#include <mach/cpu.h>
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#include <mach/mcbsp.h>
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#include <mach/dsp_common.h>
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#define DPS_RSTCT2_PER_EN (1 << 0)
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#define DSP_RSTCT2_WD_PER_EN (1 << 1)
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struct mcbsp_internal_clk {
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struct clk clk;
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struct clk **childs;
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int n_childs;
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};
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#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
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static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
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{
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const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
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int i;
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mclk->n_childs = ARRAY_SIZE(clk_names);
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mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
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GFP_KERNEL);
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for (i = 0; i < mclk->n_childs; i++) {
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/* We fake a platform device to get correct device id */
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struct platform_device pdev;
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pdev.dev.bus = &platform_bus_type;
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pdev.id = mclk->clk.id;
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mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
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if (IS_ERR(mclk->childs[i]))
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printk(KERN_ERR "Could not get clock %s (%d).\n",
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clk_names[i], mclk->clk.id);
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}
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}
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static int omap_mcbsp_clk_enable(struct clk *clk)
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{
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struct mcbsp_internal_clk *mclk = container_of(clk,
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struct mcbsp_internal_clk, clk);
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int i;
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for (i = 0; i < mclk->n_childs; i++)
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clk_enable(mclk->childs[i]);
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return 0;
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}
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static void omap_mcbsp_clk_disable(struct clk *clk)
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{
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struct mcbsp_internal_clk *mclk = container_of(clk,
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struct mcbsp_internal_clk, clk);
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int i;
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for (i = 0; i < mclk->n_childs; i++)
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clk_disable(mclk->childs[i]);
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}
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static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
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{
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.clk = {
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.name = "mcbsp_clk",
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.id = 1,
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.enable = omap_mcbsp_clk_enable,
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.disable = omap_mcbsp_clk_disable,
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},
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},
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{
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.clk = {
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.name = "mcbsp_clk",
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.id = 3,
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.enable = omap_mcbsp_clk_enable,
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.disable = omap_mcbsp_clk_disable,
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},
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},
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};
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#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
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#else
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#define omap_mcbsp_clks_size 0
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static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
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static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
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{ }
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#endif
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static int omap1_mcbsp_check(unsigned int id)
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{
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/* REVISIT: Check correctly for number of registered McBSPs */
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if (cpu_is_omap730()) {
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if (id > OMAP_MAX_MCBSP_COUNT - 2) {
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printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
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id + 1);
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return -ENODEV;
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}
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return 0;
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}
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if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
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if (id > OMAP_MAX_MCBSP_COUNT - 1) {
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printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n",
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id + 1);
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return -ENODEV;
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}
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return 0;
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}
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return -ENODEV;
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}
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static void omap1_mcbsp_request(unsigned int id)
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{
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/*
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* On 1510, 1610 and 1710, McBSP1 and McBSP3
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* are DSP public peripherals.
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*/
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if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
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omap_dsp_request_mem();
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/*
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* DSP external peripheral reset
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* FIXME: This should be moved to dsp code
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*/
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__raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
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DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
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}
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}
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static void omap1_mcbsp_free(unsigned int id)
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{
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if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
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omap_dsp_release_mem();
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}
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static struct omap_mcbsp_ops omap1_mcbsp_ops = {
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.check = omap1_mcbsp_check,
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.request = omap1_mcbsp_request,
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.free = omap1_mcbsp_free,
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};
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#ifdef CONFIG_ARCH_OMAP730
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static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
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{
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.phys_base = OMAP730_MCBSP1_BASE,
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.virt_base = io_p2v(OMAP730_MCBSP1_BASE),
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.dma_rx_sync = OMAP_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP1_TX,
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.rx_irq = INT_730_McBSP1RX,
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.tx_irq = INT_730_McBSP1TX,
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.ops = &omap1_mcbsp_ops,
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},
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{
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.phys_base = OMAP730_MCBSP2_BASE,
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.virt_base = io_p2v(OMAP730_MCBSP2_BASE),
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.dma_rx_sync = OMAP_DMA_MCBSP3_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP3_TX,
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.rx_irq = INT_730_McBSP2RX,
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.tx_irq = INT_730_McBSP2TX,
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.ops = &omap1_mcbsp_ops,
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},
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};
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#define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata)
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#else
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#define omap730_mcbsp_pdata NULL
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#define OMAP730_MCBSP_PDATA_SZ 0
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#endif
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#ifdef CONFIG_ARCH_OMAP15XX
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static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
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{
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.phys_base = OMAP1510_MCBSP1_BASE,
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.virt_base = OMAP1510_MCBSP1_BASE,
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.dma_rx_sync = OMAP_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP1_TX,
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.rx_irq = INT_McBSP1RX,
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.tx_irq = INT_McBSP1TX,
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.ops = &omap1_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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{
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.phys_base = OMAP1510_MCBSP2_BASE,
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.virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
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.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP2_TX,
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.rx_irq = INT_1510_SPI_RX,
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.tx_irq = INT_1510_SPI_TX,
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.ops = &omap1_mcbsp_ops,
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},
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{
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.phys_base = OMAP1510_MCBSP3_BASE,
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.virt_base = OMAP1510_MCBSP3_BASE,
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.dma_rx_sync = OMAP_DMA_MCBSP3_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP3_TX,
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.rx_irq = INT_McBSP3RX,
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.tx_irq = INT_McBSP3TX,
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.ops = &omap1_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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};
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#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
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#else
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#define omap15xx_mcbsp_pdata NULL
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#define OMAP15XX_MCBSP_PDATA_SZ 0
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#endif
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#ifdef CONFIG_ARCH_OMAP16XX
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static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
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{
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.phys_base = OMAP1610_MCBSP1_BASE,
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.virt_base = OMAP1610_MCBSP1_BASE,
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.dma_rx_sync = OMAP_DMA_MCBSP1_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP1_TX,
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.rx_irq = INT_McBSP1RX,
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.tx_irq = INT_McBSP1TX,
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.ops = &omap1_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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{
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.phys_base = OMAP1610_MCBSP2_BASE,
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.virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
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.dma_rx_sync = OMAP_DMA_MCBSP2_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP2_TX,
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.rx_irq = INT_1610_McBSP2_RX,
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.tx_irq = INT_1610_McBSP2_TX,
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.ops = &omap1_mcbsp_ops,
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},
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{
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.phys_base = OMAP1610_MCBSP3_BASE,
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.virt_base = OMAP1610_MCBSP3_BASE,
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.dma_rx_sync = OMAP_DMA_MCBSP3_RX,
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.dma_tx_sync = OMAP_DMA_MCBSP3_TX,
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.rx_irq = INT_McBSP3RX,
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.tx_irq = INT_McBSP3TX,
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.ops = &omap1_mcbsp_ops,
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.clk_name = "mcbsp_clk",
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},
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};
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#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
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#else
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#define omap16xx_mcbsp_pdata NULL
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#define OMAP16XX_MCBSP_PDATA_SZ 0
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#endif
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int __init omap1_mcbsp_init(void)
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{
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int i;
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for (i = 0; i < omap_mcbsp_clks_size; i++) {
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if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
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omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
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clk_register(&omap_mcbsp_clks[i].clk);
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}
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}
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if (cpu_is_omap730())
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omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata,
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OMAP730_MCBSP_PDATA_SZ);
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if (cpu_is_omap15xx())
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omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
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OMAP15XX_MCBSP_PDATA_SZ);
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if (cpu_is_omap16xx())
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omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata,
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OMAP16XX_MCBSP_PDATA_SZ);
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return omap_mcbsp_init();
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}
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arch_initcall(omap1_mcbsp_init);
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