eb975652b8
The MPIC_PRIMARY define was recently made "default" and the meaning was inverted to MPIC_SECONDARY. This causes compile errors in currituck now, so fix it to the new manner of allocating mpics. Signed-off-by: Josh Boyer <jwboyer@gmail.com>
205 lines
5.4 KiB
C
205 lines
5.4 KiB
C
/*
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* Currituck board specific routines
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*
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* Copyright © 2011 Tony Breeds IBM Corporation
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*
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* Based on earlier code:
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* Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2002-2005 MontaVista Software Inc.
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*
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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* Copyright (c) 2003-2005 Zultys Technologies
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*
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* Rewritten and ported to the merged powerpc tree:
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* Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
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* Copyright © 2011 David Kliekamp IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/memblock.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/rtc.h>
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#include <asm/machdep.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/time.h>
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#include <asm/uic.h>
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#include <asm/ppc4xx.h>
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#include <asm/mpic.h>
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#include <asm/mmu.h>
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#include <linux/pci.h>
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static __initdata struct of_device_id ppc47x_of_bus[] = {
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{ .compatible = "ibm,plb4", },
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{ .compatible = "ibm,plb6", },
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{ .compatible = "ibm,opb", },
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{ .compatible = "ibm,ebc", },
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{},
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};
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/* The EEPROM is missing and the default values are bogus. This forces USB in
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* to EHCI mode */
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static void __devinit quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
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{
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if (of_machine_is_compatible("ibm,currituck")) {
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pci_write_config_dword(dev, 0xe0, 0x0114231f);
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pci_write_config_dword(dev, 0xe4, 0x00006c40);
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}
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}
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DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
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static int __init ppc47x_device_probe(void)
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{
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of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
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return 0;
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}
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machine_device_initcall(ppc47x, ppc47x_device_probe);
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/* We can have either UICs or MPICs */
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static void __init ppc47x_init_irq(void)
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{
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struct device_node *np;
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/* Find top level interrupt controller */
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for_each_node_with_property(np, "interrupt-controller") {
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if (of_get_property(np, "interrupts", NULL) == NULL)
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break;
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}
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if (np == NULL)
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panic("Can't find top level interrupt controller");
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/* Check type and do appropriate initialization */
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if (of_device_is_compatible(np, "chrp,open-pic")) {
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/* The MPIC driver will get everything it needs from the
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* device-tree, just pass 0 to all arguments
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*/
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struct mpic *mpic =
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mpic_alloc(np, 0, 0, 0, 0, " MPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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ppc_md.get_irq = mpic_get_irq;
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} else
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panic("Unrecognized top level interrupt controller");
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}
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#ifdef CONFIG_SMP
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static void __cpuinit smp_ppc47x_setup_cpu(int cpu)
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{
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mpic_setup_this_cpu();
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}
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static int __cpuinit smp_ppc47x_kick_cpu(int cpu)
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{
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struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
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const u64 *spin_table_addr_prop;
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u32 *spin_table;
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extern void start_secondary_47x(void);
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BUG_ON(cpunode == NULL);
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/* Assume spin table. We could test for the enable-method in
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* the device-tree but currently there's little point as it's
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* our only supported method
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*/
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spin_table_addr_prop =
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of_get_property(cpunode, "cpu-release-addr", NULL);
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if (spin_table_addr_prop == NULL) {
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pr_err("CPU%d: Can't start, missing cpu-release-addr !\n",
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cpu);
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return 1;
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}
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/* Assume it's mapped as part of the linear mapping. This is a bit
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* fishy but will work fine for now
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*
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* XXX: Is there any reason to assume differently?
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*/
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spin_table = (u32 *)__va(*spin_table_addr_prop);
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pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
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spin_table[3] = cpu;
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smp_wmb();
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spin_table[1] = __pa(start_secondary_47x);
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mb();
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return 0;
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}
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static struct smp_ops_t ppc47x_smp_ops = {
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.probe = smp_mpic_probe,
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.message_pass = smp_mpic_message_pass,
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.setup_cpu = smp_ppc47x_setup_cpu,
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.kick_cpu = smp_ppc47x_kick_cpu,
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.give_timebase = smp_generic_give_timebase,
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.take_timebase = smp_generic_take_timebase,
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};
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static void __init ppc47x_smp_init(void)
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{
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if (mmu_has_feature(MMU_FTR_TYPE_47x))
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smp_ops = &ppc47x_smp_ops;
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}
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#else /* CONFIG_SMP */
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static void __init ppc47x_smp_init(void) { }
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#endif /* CONFIG_SMP */
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static void __init ppc47x_setup_arch(void)
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{
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/* No need to check the DMA config as we /know/ our windows are all of
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* RAM. Lets hope that doesn't change */
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#ifdef CONFIG_SWIOTLB
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if (memblock_end_of_DRAM() > 0xffffffff) {
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ppc_swiotlb_enable = 1;
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set_pci_dma_ops(&swiotlb_dma_ops);
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ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
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}
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#endif
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ppc47x_smp_init();
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}
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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static int __init ppc47x_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (!of_flat_dt_is_compatible(root, "ibm,currituck"))
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return 0;
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return 1;
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}
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/* Use USB controller should have been hardware swizzled but it wasn't :( */
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static void ppc47x_pci_irq_fixup(struct pci_dev *dev)
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{
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if (dev->vendor == 0x1033 && (dev->device == 0x0035 ||
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dev->device == 0x00e0)) {
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dev->irq = irq_create_mapping(NULL, 47);
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pr_info("%s: Mapping irq 47 %d\n", __func__, dev->irq);
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}
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}
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define_machine(ppc47x) {
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.name = "PowerPC 47x",
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.probe = ppc47x_probe,
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.progress = udbg_progress,
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.init_IRQ = ppc47x_init_irq,
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.setup_arch = ppc47x_setup_arch,
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.pci_irq_fixup = ppc47x_pci_irq_fixup,
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.restart = ppc4xx_reset_system,
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.calibrate_decr = generic_calibrate_decr,
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};
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