41863f730f
The Nomadik NAND driver is really just a subset of the existing FSMC driver, so let's switch over to using that driver instead, since it handles more variants of this chip. The callbacks for setting up the chip is doing stuff now handled by the FSMC driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Alessandro Rubini <rubini@unipv.it> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/clk-provider.h>
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/*
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* The Nomadik clock tree is described in the STN8815A12 DB V4.2
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* reference manual for the chip, page 94 ff.
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*/
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void __init nomadik_clk_init(void)
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{
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struct clk *clk;
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clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
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clk_register_clkdev(clk, "apb_pclk", NULL);
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clk_register_clkdev(clk, NULL, "gpio.0");
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clk_register_clkdev(clk, NULL, "gpio.1");
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clk_register_clkdev(clk, NULL, "gpio.2");
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clk_register_clkdev(clk, NULL, "gpio.3");
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clk_register_clkdev(clk, NULL, "rng");
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clk_register_clkdev(clk, NULL, "fsmc-nand");
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/*
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* The 2.4 MHz TIMCLK reference clock is active at boot time, this is
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* actually the MXTALCLK @19.2 MHz divided by 8. This clock is used
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* by the timers and watchdog. See page 105 ff.
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*/
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clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT,
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2400000);
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clk_register_clkdev(clk, NULL, "mtu0");
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clk_register_clkdev(clk, NULL, "mtu1");
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/*
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* At boot time, PLL2 is set to generate a set of fixed clocks,
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* one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD
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* I2C, IrDA, USB and SSP blocks.
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*/
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clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT,
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48000000);
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clk_register_clkdev(clk, NULL, "uart0");
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clk_register_clkdev(clk, NULL, "uart1");
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clk_register_clkdev(clk, NULL, "mmci");
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clk_register_clkdev(clk, NULL, "ssp");
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clk_register_clkdev(clk, NULL, "nmk-i2c.0");
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clk_register_clkdev(clk, NULL, "nmk-i2c.1");
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}
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