294 lines
7.1 KiB
C
294 lines
7.1 KiB
C
/*
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* include/asm-xtensa/atomic.h
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*
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* Atomic operations that C can't guarantee us. Useful for resource counting..
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_ATOMIC_H
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#define _XTENSA_ATOMIC_H
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#include <linux/stringify.h>
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typedef struct { volatile int counter; } atomic_t;
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#ifdef __KERNEL__
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#include <asm/processor.h>
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#include <asm/system.h>
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#define ATOMIC_INIT(i) { (i) }
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/*
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* This Xtensa implementation assumes that the right mechanism
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* for exclusion is for locking interrupts to level 1.
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*
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* Locking interrupts looks like this:
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*
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* rsil a15, 1
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* <code>
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* wsr a15, PS
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* rsync
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*
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* Note that a15 is used here because the register allocation
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* done by the compiler is not guaranteed and a window overflow
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* may not occur between the rsil and wsr instructions. By using
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* a15 in the rsil, the machine is guaranteed to be in a state
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* where no register reference will cause an overflow.
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*/
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/**
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* atomic_read - read atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically reads the value of @v.
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*/
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#define atomic_read(v) ((v)->counter)
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/**
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* atomic_set - set atomic variable
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* @v: pointer of type atomic_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*/
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#define atomic_set(v,i) ((v)->counter = (i))
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/**
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* atomic_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v.
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*/
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static inline void atomic_add(int i, atomic_t * v)
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{
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unsigned int vval;
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__asm__ __volatile__(
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"rsil a15, "__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %2, 0 \n\t"
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"add %0, %0, %1 \n\t"
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"s32i %0, %2, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n"
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: "=&a" (vval)
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: "a" (i), "a" (v)
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: "a15", "memory"
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);
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}
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/**
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* atomic_sub - subtract the atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v.
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*/
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static inline void atomic_sub(int i, atomic_t *v)
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{
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unsigned int vval;
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__asm__ __volatile__(
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"rsil a15, "__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %2, 0 \n\t"
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"sub %0, %0, %1 \n\t"
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"s32i %0, %2, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n"
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: "=&a" (vval)
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: "a" (i), "a" (v)
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: "a15", "memory"
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);
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}
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/*
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* We use atomic_{add|sub}_return to define other functions.
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*/
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static inline int atomic_add_return(int i, atomic_t * v)
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{
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unsigned int vval;
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__asm__ __volatile__(
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"rsil a15,"__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %2, 0 \n\t"
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"add %0, %0, %1 \n\t"
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"s32i %0, %2, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n"
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: "=&a" (vval)
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: "a" (i), "a" (v)
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: "a15", "memory"
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);
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return vval;
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}
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static inline int atomic_sub_return(int i, atomic_t * v)
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{
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unsigned int vval;
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__asm__ __volatile__(
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"rsil a15,"__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %2, 0 \n\t"
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"sub %0, %0, %1 \n\t"
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"s32i %0, %2, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n"
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: "=&a" (vval)
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: "a" (i), "a" (v)
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: "a15", "memory"
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);
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return vval;
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}
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/**
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* atomic_sub_and_test - subtract value from variable and test result
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v and returns
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* true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
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/**
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* atomic_inc - increment atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1.
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*/
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#define atomic_inc(v) atomic_add(1,(v))
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/**
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* atomic_inc - increment atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1.
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*/
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#define atomic_inc_return(v) atomic_add_return(1,(v))
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/**
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* atomic_dec - decrement atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1.
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*/
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#define atomic_dec(v) atomic_sub(1,(v))
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/**
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* atomic_dec_return - decrement atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1.
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*/
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#define atomic_dec_return(v) atomic_sub_return(1,(v))
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/**
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* atomic_dec_and_test - decrement and test
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1 and
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* returns true if the result is 0, or false for all other
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* cases.
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*/
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#define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0)
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/**
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0)
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/**
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* atomic_add_negative - add and test if negative
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* @v: pointer of type atomic_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns true
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* if the result is negative, or false when
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* result is greater than or equal to zero.
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*/
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#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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* atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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#define atomic_add_unless(v, a, u) \
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({ \
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int c, old; \
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c = atomic_read(v); \
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while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
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c = old; \
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c != (u); \
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})
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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unsigned int all_f = -1;
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unsigned int vval;
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__asm__ __volatile__(
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"rsil a15,"__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %2, 0 \n\t"
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"xor %1, %4, %3 \n\t"
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"and %0, %0, %4 \n\t"
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"s32i %0, %2, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n"
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: "=&a" (vval), "=a" (mask)
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: "a" (v), "a" (all_f), "1" (mask)
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: "a15", "memory"
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);
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}
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static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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unsigned int vval;
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__asm__ __volatile__(
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"rsil a15,"__stringify(LOCKLEVEL)"\n\t"
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"l32i %0, %2, 0 \n\t"
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"or %0, %0, %1 \n\t"
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"s32i %0, %2, 0 \n\t"
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"wsr a15, "__stringify(PS)" \n\t"
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"rsync \n"
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: "=&a" (vval)
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: "a" (mask), "a" (v)
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: "a15", "memory"
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);
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}
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic.h>
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#endif /* __KERNEL__ */
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#endif /* _XTENSA_ATOMIC_H */
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