e80a0e6e7c
Conflicts: include/asm-arm/arch-at91rm9200/entry-macro.S Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
33 lines
891 B
ArmAsm
33 lines
891 B
ArmAsm
/*
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* include/asm-arm/arch-imx/entry-macro.S
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*
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* Low-level IRQ helper macros for iMX-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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#define AITC_NIVECSR 0x40
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =IO_ADDRESS(IMX_AITC_BASE)
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@ Load offset & priority of the highest priority
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@ interrupt pending.
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ldr \irqstat, [\base, #AITC_NIVECSR]
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@ Shift off the priority leaving the offset or
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@ "interrupt number", use arithmetic shift to
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@ transform illegal source (0xffff) as -1
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mov \irqnr, \irqstat, asr #16
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adds \tmp, \irqnr, #1
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.endm
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