799a0600ac
Add debounce support for ep93xx gpio interrupts. On the EP93xx, GPIO ports A, B, and F can be used to generate interrupts. For each port, if interrupts are enabled, it is possible to debouce the input signal. Debouncing is implemented by passing the input signal through a 2-bit shift register clocked by a 128Hz clock. This patch adds a platform specific way to enable the debouce feature for these input ports. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
131 lines
4.8 KiB
C
131 lines
4.8 KiB
C
/*
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* arch/arm/mach-ep93xx/include/mach/gpio.h
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*/
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#ifndef __ASM_ARCH_GPIO_H
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#define __ASM_ARCH_GPIO_H
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/* GPIO port A. */
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#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
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#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
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#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
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#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
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#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
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#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
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#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
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#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
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#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
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/* GPIO port B. */
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#define EP93XX_GPIO_LINE_B(x) ((x) + 8)
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#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
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#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
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#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
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#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
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#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
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#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
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#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
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#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
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/* GPIO port C. */
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#define EP93XX_GPIO_LINE_C(x) ((x) + 40)
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#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
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#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
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#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
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#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
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#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
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#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
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#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
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#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
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/* GPIO port D. */
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#define EP93XX_GPIO_LINE_D(x) ((x) + 24)
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#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
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#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
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#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
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#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
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#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
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#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
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#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
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#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
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/* GPIO port E. */
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#define EP93XX_GPIO_LINE_E(x) ((x) + 32)
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#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
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#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
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#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
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#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
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#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
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#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
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#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
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#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
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/* GPIO port F. */
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#define EP93XX_GPIO_LINE_F(x) ((x) + 16)
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#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
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#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
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#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
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#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
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#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
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#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
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#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
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#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
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/* GPIO port G. */
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#define EP93XX_GPIO_LINE_G(x) ((x) + 48)
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#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
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#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
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#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
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#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
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#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
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#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
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#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
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#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
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/* GPIO port H. */
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#define EP93XX_GPIO_LINE_H(x) ((x) + 56)
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#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
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#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
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#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
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#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
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#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
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#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
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#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
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#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
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/* maximum value for gpio line identifiers */
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#define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7)
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/* maximum value for irq capable line identifiers */
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#define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7)
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extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
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/* new generic GPIO API - see Documentation/gpio.txt */
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#include <asm-generic/gpio.h>
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#define gpio_get_value __gpio_get_value
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#define gpio_set_value __gpio_set_value
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#define gpio_cansleep __gpio_cansleep
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/*
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* Map GPIO A0..A7 (0..7) to irq 64..71,
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* B0..B7 (7..15) to irq 72..79, and
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* F0..F7 (16..24) to irq 80..87.
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*/
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static inline int gpio_to_irq(unsigned gpio)
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{
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if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ)
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return 64 + gpio;
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return -EINVAL;
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}
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static inline int irq_to_gpio(unsigned irq)
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{
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return irq - gpio_to_irq(0);
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}
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#endif
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