71f349799b
At the moment we have a mixture of left-over version 0 and new-format version 1 files in arch/powerpc/boot/dts. This is potentially confusing to people new to the dts format attempting to figure it out. So, this patch converts all the as-yet unconverted dts v0 files and converts them to v1. They're mechanically-converted, and not hand tweaked so in some cases they're not 100% in keeping with usual v1 style, but the convertor program does have some heuristics so the discrepancies aren't too bad. I have checked that this patch produces no changes to the resulting dtb binaries. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
71 lines
1.9 KiB
Plaintext
71 lines
1.9 KiB
Plaintext
/*
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* PS3 Game Console device tree.
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*
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* Copyright (C) 2007 Sony Computer Entertainment Inc.
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* Copyright 2007 Sony Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/dts-v1/;
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/ {
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model = "SonyPS3";
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compatible = "sony,ps3";
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#size-cells = <2>;
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#address-cells = <2>;
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chosen {
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};
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/*
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* We'll get the size of the bootmem block from lv1 after startup,
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* so we'll put a null entry here.
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*/
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memory {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
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};
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/*
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* The boot cpu is always zero for PS3.
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*
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* dtc expects a clock-frequency and timebase-frequency entries, so
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* we'll put a null entries here. These will be initialized after
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* startup with data from lv1.
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*
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* Seems the only way currently to indicate a processor has multiple
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* threads is with an ibm,ppc-interrupt-server#s entry. We'll put one
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* here so we can bring up both of ours. See smp_setup_cpu_maps().
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*/
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cpus {
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#size-cells = <0>;
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#address-cells = <1>;
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cpu@0 {
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device_type = "cpu";
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reg = <0x00000000>;
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ibm,ppc-interrupt-server#s = <0x0 0x1>;
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clock-frequency = <0>;
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timebase-frequency = <0>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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i-cache-line-size = <128>;
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d-cache-line-size = <128>;
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};
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};
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};
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