c8bf6b52af
This patch creates mpc5200b.dtsi containing the information for the MPC5200b SoC then modifies all of the dts files for MPC5200b based systems to use mpc5200b.dtsi. Signed-off-by: John Bonesio <bones@secretlab.ca> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
147 lines
3.0 KiB
Plaintext
147 lines
3.0 KiB
Plaintext
/*
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* Lite5200B board Device Tree Source
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*
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* Copyright 2006-2007 Secret Lab Technologies Ltd.
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* Grant Likely <grant.likely@secretlab.ca>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "mpc5200b.dtsi"
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/ {
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model = "fsl,lite5200b";
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compatible = "fsl,lite5200b";
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memory {
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reg = <0x00000000 0x10000000>; // 256MB
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};
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soc5200@f0000000 {
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timer@600 { // General Purpose Timer
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fsl,has-wdt;
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};
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psc@2000 { // PSC1
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compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
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cell-index = <0>;
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};
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psc@2200 { // PSC2
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status = "disabled";
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};
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psc@2400 { // PSC3
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status = "disabled";
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};
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psc@2600 { // PSC4
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status = "disabled";
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};
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psc@2800 { // PSC5
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status = "disabled";
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};
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psc@2c00 { // PSC6
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status = "disabled";
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};
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// PSC2 in ac97 mode example
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//ac97@2200 { // PSC2
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// compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
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// cell-index = <1>;
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//};
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// PSC3 in CODEC mode example
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//i2s@2400 { // PSC3
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// compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
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// cell-index = <2>;
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//};
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// PSC6 in spi mode example
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//spi@2c00 { // PSC6
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// compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
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// cell-index = <5>;
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//};
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ethernet@3000 {
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phy-handle = <&phy0>;
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};
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mdio@3000 {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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i2c@3d40 {
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eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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};
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};
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sram@8000 {
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compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
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reg = <0x8000 0x4000>;
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};
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};
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pci@f0000d00 {
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
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0xc000 0 0 2 &mpc5200_pic 1 1 3
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0xc000 0 0 3 &mpc5200_pic 1 2 3
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0xc000 0 0 4 &mpc5200_pic 1 3 3
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0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
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0xc800 0 0 2 &mpc5200_pic 1 2 3
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0xc800 0 0 3 &mpc5200_pic 1 3 3
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0xc800 0 0 4 &mpc5200_pic 0 0 3>;
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clock-frequency = <0>; // From boot loader
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interrupts = <2 8 0 2 9 0 2 10 0>;
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bus-range = <0 0>;
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ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
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0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
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0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
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};
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localbus {
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ranges = <0 0 0xfe000000 0x02000000>;
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x02000000>;
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bank-width = <1>;
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#size-cells = <1>;
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#address-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x00000000 0x00200000>;
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};
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partition@200000 {
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label = "rootfs";
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reg = <0x00200000 0x01d00000>;
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};
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partition@1f00000 {
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label = "u-boot";
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reg = <0x01f00000 0x00060000>;
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};
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partition@1f60000 {
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label = "u-boot-env";
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reg = <0x01f60000 0x00020000>;
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};
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partition@1f80000 {
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label = "dtb";
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reg = <0x01f80000 0x00080000>;
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};
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};
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};
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};
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