5d9e6ac843
We use both MSCAN controllers on this board, so do not disable them in the device tree. Signed-off-by: Anatolij Gustschin <agust@denx.de>
170 lines
3.1 KiB
Plaintext
170 lines
3.1 KiB
Plaintext
/*
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* Digsy MTC board Device Tree Source
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*
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* Copyright (C) 2009 Semihalf
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*
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* Based on the CM5200 by M. Balakowicz
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "mpc5200b.dtsi"
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/ {
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model = "intercontrol,digsy-mtc";
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compatible = "intercontrol,digsy-mtc";
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memory {
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reg = <0x00000000 0x02000000>; // 32MB
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};
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soc5200@f0000000 {
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timer@600 { // General Purpose Timer
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#gpio-cells = <2>;
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fsl,has-wdt;
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gpio-controller;
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};
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timer@610 {
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#gpio-cells = <2>;
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gpio-controller;
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};
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rtc@800 {
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status = "disabled";
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};
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spi@f00 {
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msp430@0 {
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compatible = "spidev";
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spi-max-frequency = <32000>;
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reg = <0>;
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};
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};
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psc@2000 { // PSC1
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status = "disabled";
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};
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psc@2200 { // PSC2
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status = "disabled";
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};
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psc@2400 { // PSC3
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status = "disabled";
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};
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psc@2600 { // PSC4
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compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
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};
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psc@2800 { // PSC5
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compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
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};
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psc@2c00 { // PSC6
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status = "disabled";
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};
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ethernet@3000 {
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phy-handle = <&phy0>;
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};
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mdio@3000 {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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i2c@3d00 {
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eeprom@50 {
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compatible = "at,24c08";
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reg = <0x50>;
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};
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rtc@56 {
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compatible = "mc,rv3029c2";
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reg = <0x56>;
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};
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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i2c@3d40 {
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status = "disabled";
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};
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};
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pci@f0000d00 {
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
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0xc000 0 0 2 &mpc5200_pic 0 0 3
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0xc000 0 0 3 &mpc5200_pic 0 0 3
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0xc000 0 0 4 &mpc5200_pic 0 0 3>;
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clock-frequency = <0>; // From boot loader
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interrupts = <2 8 0 2 9 0 2 10 0>;
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bus-range = <0 0>;
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ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
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0x02000000 0 0x90000000 0x90000000 0 0x10000000
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0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
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};
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localbus {
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ranges = <0 0 0xff000000 0x1000000
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4 0 0x60000000 0x0001000>;
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// 16-bit flash device at LocalPlus Bus CS0
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x1000000>;
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bank-width = <2>;
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device-width = <2>;
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#size-cells = <1>;
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#address-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x00200000>;
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};
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partition@200000 {
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label = "root";
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reg = <0x00200000 0x00300000>;
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};
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partition@500000 {
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label = "user";
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reg = <0x00500000 0x00a00000>;
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};
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partition@f00000 {
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label = "u-boot";
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reg = <0x00f00000 0x100000>;
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};
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};
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can@4,0 {
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compatible = "nxp,sja1000";
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reg = <4 0x000 0x80>;
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nxp,external-clock-frequency = <24000000>;
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interrupts = <1 2 3>; // Level-low
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};
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can@4,100 {
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compatible = "nxp,sja1000";
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reg = <4 0x100 0x80>;
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nxp,external-clock-frequency = <24000000>;
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interrupts = <1 2 3>; // Level-low
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};
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serial@4,200 {
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compatible = "nxp,sc28l92";
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reg = <4 0x200 0x10>;
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interrupts = <1 3 3>;
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};
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};
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};
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