510c72ad2d
There were a number of places that made evil PAGE_SIZE == 4k assumptions that ended up breaking when trying to play with 8k and 64k page sizes, this fixes those up. The most significant change is the way we load THREAD_SIZE, previously this was done via: mov #(THREAD_SIZE >> 8), reg shll8 reg to avoid a memory access and allow the immediate load. With a 64k PAGE_SIZE, we're out of range for the immediate load size without resorting to special instructions available in later ISAs (movi20s and so on). The "workaround" for this is to bump up the shift to 10 and insert a shll2, which gives a bit more flexibility while still being much cheaper than a memory access. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
34 lines
457 B
ArmAsm
34 lines
457 B
ArmAsm
! entry.S macro define
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.macro cli
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stc sr, r0
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or #0xf0, r0
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ldc r0, sr
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.endm
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.macro sti
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mov #0xf0, r11
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extu.b r11, r11
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not r11, r11
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stc sr, r10
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and r11, r10
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#ifdef CONFIG_HAS_SR_RB
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stc k_g_imask, r11
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or r11, r10
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#endif
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ldc r10, sr
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.endm
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.macro get_current_thread_info, ti, tmp
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#ifdef CONFIG_HAS_SR_RB
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stc r7_bank, \ti
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#else
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mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp
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shll8 \tmp
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shll2 \tmp
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mov r15, \ti
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and \tmp, \ti
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#endif
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.endm
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