4705a25c06
For parts with more than one SIC_IWR, we can optimize the writing a little bit using better Blackfin insns. Signed-off-by: Mike Frysinger <vapier@gentoo.org> |
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arch_checks.c | ||
cache-c.c | ||
cache.S | ||
clocks-init.c | ||
cpufreq.c | ||
dpmc_modes.S | ||
dpmc.c | ||
entry.S | ||
head.S | ||
interrupt.S | ||
ints-priority.c | ||
Makefile | ||
pm.c | ||
smp.c |