18aecc2b64
This support was partially present in the existing code (look for "__tilegx__" ifdefs) but with this change you can build a working kernel using the TILE-Gx toolchain and ARCH=tilegx. Most of these files are new, generally adding a foo_64.c file where previously there was just a foo_32.c file. The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx, using the existing SRCARCH mechanism in the top-level Makefile. Changes to existing files: - <asm/bitops.h> and <asm/bitops_32.h> changed to factor the include of <asm-generic/bitops/non-atomic.h> in the common header. - <asm/compat.h> and arch/tile/kernel/compat.c changed to remove the "const" markers I had put on compat_sys_execve() when trying to match some recent similar changes to the non-compat execve. It turns out the compat version wasn't "upgraded" to use const. - <asm/opcode-tile_64.h> and <asm/opcode_constants_64.h> were previously included accidentally, with the 32-bit contents. Now they have the proper 64-bit contents. Finally, I had to hack the existing hacky drivers/input/input-compat.h to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64). Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> [drivers/input]
72 lines
2.0 KiB
C
72 lines
2.0 KiB
C
/*
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* Copyright 2011 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/module.h>
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void *memchr(const void *s, int c, size_t n)
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{
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const uint64_t *last_word_ptr;
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const uint64_t *p;
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const char *last_byte_ptr;
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uintptr_t s_int;
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uint64_t goal, before_mask, v, bits;
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char *ret;
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if (__builtin_expect(n == 0, 0)) {
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/* Don't dereference any memory if the array is empty. */
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return NULL;
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}
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/* Get an aligned pointer. */
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s_int = (uintptr_t) s;
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p = (const uint64_t *)(s_int & -8);
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/* Create eight copies of the byte for which we are looking. */
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goal = 0x0101010101010101ULL * (uint8_t) c;
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/* Read the first word, but munge it so that bytes before the array
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* will not match goal.
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*
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* Note that this shift count expression works because we know
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* shift counts are taken mod 64.
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*/
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before_mask = (1ULL << (s_int << 3)) - 1;
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v = (*p | before_mask) ^ (goal & before_mask);
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/* Compute the address of the last byte. */
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last_byte_ptr = (const char *)s + n - 1;
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/* Compute the address of the word containing the last byte. */
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last_word_ptr = (const uint64_t *)((uintptr_t) last_byte_ptr & -8);
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while ((bits = __insn_v1cmpeq(v, goal)) == 0) {
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if (__builtin_expect(p == last_word_ptr, 0)) {
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/* We already read the last word in the array,
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* so give up.
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*/
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return NULL;
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}
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v = *++p;
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}
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/* We found a match, but it might be in a byte past the end
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* of the array.
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*/
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ret = ((char *)p) + (__insn_ctz(bits) >> 3);
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return (ret <= last_byte_ptr) ? ret : NULL;
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}
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EXPORT_SYMBOL(memchr);
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