42ea573f87
IXP4xx only needs +3 offset for UART registers when running in big-endian mode. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
27 lines
872 B
ArmAsm
27 lines
872 B
ArmAsm
/* arch/arm/mach-ixp4xx/include/mach/debug-macro.S
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*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0xc8000000
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movne \rx, #0xff000000
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orrne \rx, \rx, #0x00b00000
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#ifdef __ARMEB__
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add \rx,\rx,#3 @ Uart regs are at off set of 3 if
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@ byte writes used - Big Endian.
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#endif
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.endm
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#define UART_SHIFT 2
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#include <asm/hardware/debug-8250.S>
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