50dfe70fe9
eSDHC block in MPC837x SOCs reports inverted write-protect state, soon sdhci-of driver will look for sdhci,wp-inverted properties to decide whether apply a specific quirk. So, document the property and add it to device tree source files. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: David Vrabel <david.vrabel@csr.com> Cc: Ben Dooks <ben@fluff.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
28 lines
895 B
Plaintext
28 lines
895 B
Plaintext
* Freescale Enhanced Secure Digital Host Controller (eSDHC)
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The Enhanced Secure Digital Host Controller provides an interface
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for MMC, SD, and SDIO types of memory cards.
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Required properties:
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- compatible : should be
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"fsl,<chip>-esdhc", "fsl,esdhc"
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- reg : should contain eSDHC registers location and length.
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- interrupts : should contain eSDHC interrupt.
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- interrupt-parent : interrupt source phandle.
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- clock-frequency : specifies eSDHC base clock frequency.
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- sdhci,wp-inverted : (optional) specifies that eSDHC controller
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reports inverted write-protect state;
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- sdhci,1-bit-only : (optional) specifies that a controller can
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only handle 1-bit data transfers.
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Example:
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sdhci@2e000 {
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compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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