419cc97d36
Current implementation defines clock idle state indicators based on the
cpu information (cpu_is_omap24xx() or cpu_is_omap34xx()) in a system wide
manner. This patch extends the find_idlest() function in clkops to pass
back the idle state indicator for that clock, thus allowing idle state
indicators to be defined on a per clock basis if required.
This is specifically needed on AM35xx devices as the new IPSS clocks
indicates the idle status (0 is idle, 1 is ready) in a way just
opposite to how its handled in OMAP3 (0 is ready, 1 is idle).
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
[paul@pwsan.com: updated to apply after commit 98c45457 et seq.]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
126 lines
3.1 KiB
C
126 lines
3.1 KiB
C
/*
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* clock2xxx.c - OMAP2xxx-specific clock integration code
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*
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* Copyright (C) 2005-2008 Texas Instruments, Inc.
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* Copyright (C) 2004-2010 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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*
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* Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
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* Gordon McNutt and RidgeRun, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <plat/clock.h>
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#include "clock.h"
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#include "clock2xxx.h"
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#include "cm.h"
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#include "cm-regbits-24xx.h"
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struct clk *vclk, *sclk, *dclk;
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/*
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* Omap24xx specific clock functions
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*/
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#ifdef CONFIG_ARCH_OMAP2430
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/**
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* omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
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* @clk: struct clk * being enabled
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* @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
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* @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
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* @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
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*
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* OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the
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* CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE. This custom function
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* passes back the correct CM_IDLEST register address for I2CHS
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* modules. No return value.
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*/
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static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
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void __iomem **idlest_reg,
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u8 *idlest_bit,
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u8 *idlest_val)
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{
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*idlest_reg = OMAP_CM_REGADDR(CORE_MOD, CM_IDLEST);
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*idlest_bit = clk->enable_bit;
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*idlest_val = OMAP24XX_CM_IDLEST_VAL;
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}
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#else
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#define omap2430_clk_i2chs_find_idlest NULL
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#endif
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/* 2430 I2CHS has non-standard IDLEST register */
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const struct clkops clkops_omap2430_i2chs_wait = {
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.enable = omap2_dflt_clk_enable,
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.disable = omap2_dflt_clk_disable,
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.find_idlest = omap2430_clk_i2chs_find_idlest,
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.find_companion = omap2_clk_dflt_find_companion,
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};
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/*
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* Set clocks for bypass mode for reboot to work.
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*/
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void omap2xxx_clk_prepare_for_reboot(void)
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{
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u32 rate;
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if (vclk == NULL || sclk == NULL)
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return;
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rate = clk_get_rate(sclk);
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clk_set_rate(vclk, rate);
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}
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/*
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* Switch the MPU rate if specified on cmdline.
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* We cannot do this early until cmdline is parsed.
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*/
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static int __init omap2xxx_clk_arch_init(void)
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{
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struct clk *virt_prcm_set, *sys_ck, *dpll_ck, *mpu_ck;
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unsigned long sys_ck_rate;
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if (!cpu_is_omap24xx())
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return 0;
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if (!mpurate)
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return -EINVAL;
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virt_prcm_set = clk_get(NULL, "virt_prcm_set");
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sys_ck = clk_get(NULL, "sys_ck");
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dpll_ck = clk_get(NULL, "dpll_ck");
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mpu_ck = clk_get(NULL, "mpu_ck");
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if (clk_set_rate(virt_prcm_set, mpurate))
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printk(KERN_ERR "Could not find matching MPU rate\n");
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recalculate_root_clocks();
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sys_ck_rate = clk_get_rate(sys_ck);
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pr_info("Switched to new clocking rate (Crystal/DPLL/MPU): "
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"%ld.%01ld/%ld/%ld MHz\n",
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(sys_ck_rate / 1000000), (sys_ck_rate / 100000) % 10,
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(clk_get_rate(dpll_ck) / 1000000),
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(clk_get_rate(mpu_ck) / 1000000));
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return 0;
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}
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arch_initcall(omap2xxx_clk_arch_init);
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