1503 lines
35 KiB
C
1503 lines
35 KiB
C
/* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
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* time.c: UltraSparc timer and TOD clock support.
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*
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* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
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*
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* Based largely on code which is:
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*
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* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/mc146818rtc.h>
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#include <linux/delay.h>
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#include <linux/profile.h>
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#include <linux/bcd.h>
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#include <linux/jiffies.h>
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#include <linux/cpufreq.h>
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#include <linux/percpu.h>
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#include <linux/profile.h>
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#include <linux/miscdevice.h>
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#include <linux/rtc.h>
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#include <asm/oplib.h>
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#include <asm/mostek.h>
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#include <asm/timer.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/sbus.h>
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#include <asm/fhc.h>
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#include <asm/pbm.h>
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#include <asm/ebus.h>
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#include <asm/isa.h>
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#include <asm/starfire.h>
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#include <asm/smp.h>
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#include <asm/sections.h>
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#include <asm/cpudata.h>
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#include <asm/uaccess.h>
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#include <asm/prom.h>
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DEFINE_SPINLOCK(mostek_lock);
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DEFINE_SPINLOCK(rtc_lock);
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void __iomem *mstk48t02_regs = NULL;
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#ifdef CONFIG_PCI
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unsigned long ds1287_regs = 0UL;
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#endif
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extern unsigned long wall_jiffies;
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static void __iomem *mstk48t08_regs;
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static void __iomem *mstk48t59_regs;
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static int set_rtc_mmss(unsigned long);
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#define TICK_PRIV_BIT (1UL << 63)
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#ifdef CONFIG_SMP
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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if (in_lock_functions(pc))
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return regs->u_regs[UREG_RETPC];
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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#endif
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static void tick_disable_protection(void)
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{
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/* Set things up so user can access tick register for profiling
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* purposes. Also workaround BB_ERRATA_1 by doing a dummy
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* read back of %tick after writing it.
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*/
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__asm__ __volatile__(
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" ba,pt %%xcc, 1f\n"
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" nop\n"
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" .align 64\n"
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"1: rd %%tick, %%g2\n"
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" add %%g2, 6, %%g2\n"
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" andn %%g2, %0, %%g2\n"
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" wrpr %%g2, 0, %%tick\n"
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" rdpr %%tick, %%g0"
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: /* no outputs */
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: "r" (TICK_PRIV_BIT)
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: "g2");
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}
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static void tick_init_tick(unsigned long offset)
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{
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tick_disable_protection();
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__asm__ __volatile__(
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" rd %%tick, %%g1\n"
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" andn %%g1, %1, %%g1\n"
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" ba,pt %%xcc, 1f\n"
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" add %%g1, %0, %%g1\n"
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" .align 64\n"
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"1: wr %%g1, 0x0, %%tick_cmpr\n"
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" rd %%tick_cmpr, %%g0"
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: /* no outputs */
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: "r" (offset), "r" (TICK_PRIV_BIT)
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: "g1");
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}
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static unsigned long tick_get_tick(void)
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{
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unsigned long ret;
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__asm__ __volatile__("rd %%tick, %0\n\t"
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"mov %0, %0"
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: "=r" (ret));
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return ret & ~TICK_PRIV_BIT;
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}
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static unsigned long tick_get_compare(void)
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{
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unsigned long ret;
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__asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
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"mov %0, %0"
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: "=r" (ret));
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return ret;
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}
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static unsigned long tick_add_compare(unsigned long adj)
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{
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unsigned long new_compare;
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/* Workaround for Spitfire Errata (#54 I think??), I discovered
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* this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
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* number 103640.
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*
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* On Blackbird writes to %tick_cmpr can fail, the
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* workaround seems to be to execute the wr instruction
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* at the start of an I-cache line, and perform a dummy
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* read back from %tick_cmpr right after writing to it. -DaveM
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*/
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__asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
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"ba,pt %%xcc, 1f\n\t"
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" add %0, %1, %0\n\t"
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".align 64\n"
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"1:\n\t"
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"wr %0, 0, %%tick_cmpr\n\t"
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"rd %%tick_cmpr, %%g0"
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: "=&r" (new_compare)
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: "r" (adj));
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return new_compare;
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}
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static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
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{
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unsigned long new_tick, tmp;
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/* Also need to handle Blackbird bug here too. */
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__asm__ __volatile__("rd %%tick, %0\n\t"
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"add %0, %2, %0\n\t"
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"wrpr %0, 0, %%tick\n\t"
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"andn %0, %4, %1\n\t"
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"ba,pt %%xcc, 1f\n\t"
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" add %1, %3, %1\n\t"
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".align 64\n"
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"1:\n\t"
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"wr %1, 0, %%tick_cmpr\n\t"
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"rd %%tick_cmpr, %%g0"
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: "=&r" (new_tick), "=&r" (tmp)
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: "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
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return new_tick;
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}
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static struct sparc64_tick_ops tick_operations __read_mostly = {
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.init_tick = tick_init_tick,
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.get_tick = tick_get_tick,
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.get_compare = tick_get_compare,
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.add_tick = tick_add_tick,
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.add_compare = tick_add_compare,
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.softint_mask = 1UL << 0,
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};
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struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
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static void stick_init_tick(unsigned long offset)
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{
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/* Writes to the %tick and %stick register are not
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* allowed on sun4v. The Hypervisor controls that
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* bit, per-strand.
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*/
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if (tlb_type != hypervisor) {
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tick_disable_protection();
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/* Let the user get at STICK too. */
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__asm__ __volatile__(
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" rd %%asr24, %%g2\n"
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" andn %%g2, %0, %%g2\n"
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" wr %%g2, 0, %%asr24"
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: /* no outputs */
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: "r" (TICK_PRIV_BIT)
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: "g1", "g2");
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}
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__asm__ __volatile__(
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" rd %%asr24, %%g1\n"
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" andn %%g1, %1, %%g1\n"
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" add %%g1, %0, %%g1\n"
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" wr %%g1, 0x0, %%asr25"
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: /* no outputs */
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: "r" (offset), "r" (TICK_PRIV_BIT)
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: "g1");
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}
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static unsigned long stick_get_tick(void)
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{
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unsigned long ret;
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__asm__ __volatile__("rd %%asr24, %0"
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: "=r" (ret));
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return ret & ~TICK_PRIV_BIT;
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}
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static unsigned long stick_get_compare(void)
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{
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unsigned long ret;
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__asm__ __volatile__("rd %%asr25, %0"
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: "=r" (ret));
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return ret;
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}
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static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
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{
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unsigned long new_tick, tmp;
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__asm__ __volatile__("rd %%asr24, %0\n\t"
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"add %0, %2, %0\n\t"
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"wr %0, 0, %%asr24\n\t"
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"andn %0, %4, %1\n\t"
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"add %1, %3, %1\n\t"
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"wr %1, 0, %%asr25"
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: "=&r" (new_tick), "=&r" (tmp)
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: "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
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return new_tick;
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}
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static unsigned long stick_add_compare(unsigned long adj)
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{
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unsigned long new_compare;
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__asm__ __volatile__("rd %%asr25, %0\n\t"
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"add %0, %1, %0\n\t"
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"wr %0, 0, %%asr25"
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: "=&r" (new_compare)
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: "r" (adj));
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return new_compare;
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}
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static struct sparc64_tick_ops stick_operations __read_mostly = {
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.init_tick = stick_init_tick,
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.get_tick = stick_get_tick,
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.get_compare = stick_get_compare,
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.add_tick = stick_add_tick,
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.add_compare = stick_add_compare,
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.softint_mask = 1UL << 16,
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};
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/* On Hummingbird the STICK/STICK_CMPR register is implemented
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* in I/O space. There are two 64-bit registers each, the
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* first holds the low 32-bits of the value and the second holds
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* the high 32-bits.
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*
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* Since STICK is constantly updating, we have to access it carefully.
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*
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* The sequence we use to read is:
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* 1) read high
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* 2) read low
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* 3) read high again, if it rolled re-read both low and high again.
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*
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* Writing STICK safely is also tricky:
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* 1) write low to zero
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* 2) write high
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* 3) write low
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*/
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#define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
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#define HBIRD_STICK_ADDR 0x1fe0000f070UL
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static unsigned long __hbird_read_stick(void)
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{
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unsigned long ret, tmp1, tmp2, tmp3;
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unsigned long addr = HBIRD_STICK_ADDR+8;
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__asm__ __volatile__("ldxa [%1] %5, %2\n"
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"1:\n\t"
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"sub %1, 0x8, %1\n\t"
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"ldxa [%1] %5, %3\n\t"
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"add %1, 0x8, %1\n\t"
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"ldxa [%1] %5, %4\n\t"
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"cmp %4, %2\n\t"
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"bne,a,pn %%xcc, 1b\n\t"
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" mov %4, %2\n\t"
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"sllx %4, 32, %4\n\t"
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"or %3, %4, %0\n\t"
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: "=&r" (ret), "=&r" (addr),
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"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
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: "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
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return ret;
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}
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static unsigned long __hbird_read_compare(void)
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{
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unsigned long low, high;
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unsigned long addr = HBIRD_STICKCMP_ADDR;
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__asm__ __volatile__("ldxa [%2] %3, %0\n\t"
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"add %2, 0x8, %2\n\t"
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"ldxa [%2] %3, %1"
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: "=&r" (low), "=&r" (high), "=&r" (addr)
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: "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
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return (high << 32UL) | low;
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}
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static void __hbird_write_stick(unsigned long val)
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{
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unsigned long low = (val & 0xffffffffUL);
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unsigned long high = (val >> 32UL);
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unsigned long addr = HBIRD_STICK_ADDR;
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__asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
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"add %0, 0x8, %0\n\t"
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"stxa %3, [%0] %4\n\t"
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"sub %0, 0x8, %0\n\t"
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"stxa %2, [%0] %4"
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: "=&r" (addr)
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: "0" (addr), "r" (low), "r" (high),
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"i" (ASI_PHYS_BYPASS_EC_E));
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}
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static void __hbird_write_compare(unsigned long val)
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{
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unsigned long low = (val & 0xffffffffUL);
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unsigned long high = (val >> 32UL);
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unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
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__asm__ __volatile__("stxa %3, [%0] %4\n\t"
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"sub %0, 0x8, %0\n\t"
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"stxa %2, [%0] %4"
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: "=&r" (addr)
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: "0" (addr), "r" (low), "r" (high),
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"i" (ASI_PHYS_BYPASS_EC_E));
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}
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static void hbtick_init_tick(unsigned long offset)
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{
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unsigned long val;
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tick_disable_protection();
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/* XXX This seems to be necessary to 'jumpstart' Hummingbird
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* XXX into actually sending STICK interrupts. I think because
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* XXX of how we store %tick_cmpr in head.S this somehow resets the
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* XXX {TICK + STICK} interrupt mux. -DaveM
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*/
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__hbird_write_stick(__hbird_read_stick());
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val = __hbird_read_stick() & ~TICK_PRIV_BIT;
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__hbird_write_compare(val + offset);
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}
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static unsigned long hbtick_get_tick(void)
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{
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return __hbird_read_stick() & ~TICK_PRIV_BIT;
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}
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static unsigned long hbtick_get_compare(void)
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{
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return __hbird_read_compare();
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}
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static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
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{
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unsigned long val;
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val = __hbird_read_stick() + adj;
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__hbird_write_stick(val);
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val &= ~TICK_PRIV_BIT;
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__hbird_write_compare(val + offset);
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return val;
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}
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static unsigned long hbtick_add_compare(unsigned long adj)
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{
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unsigned long val = __hbird_read_compare() + adj;
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val &= ~TICK_PRIV_BIT;
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__hbird_write_compare(val);
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return val;
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}
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static struct sparc64_tick_ops hbtick_operations __read_mostly = {
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.init_tick = hbtick_init_tick,
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.get_tick = hbtick_get_tick,
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.get_compare = hbtick_get_compare,
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.add_tick = hbtick_add_tick,
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.add_compare = hbtick_add_compare,
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.softint_mask = 1UL << 0,
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};
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/* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "do_timer()" routine every clocktick
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*
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* NOTE: On SUN5 systems the ticker interrupt comes in using 2
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* interrupts, one at level14 and one with softint bit 0.
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*/
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unsigned long timer_tick_offset __read_mostly;
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static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
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#define TICK_SIZE (tick_nsec / 1000)
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static inline void timer_check_rtc(void)
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{
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/* last time the cmos clock got updated */
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static long last_rtc_update;
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/* Determine when to update the Mostek clock. */
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if (ntp_synced() &&
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xtime.tv_sec > last_rtc_update + 660 &&
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(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
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(xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
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if (set_rtc_mmss(xtime.tv_sec) == 0)
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last_rtc_update = xtime.tv_sec;
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else
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last_rtc_update = xtime.tv_sec - 600;
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/* do it again in 60 s */
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}
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}
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irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
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{
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unsigned long ticks, compare, pstate;
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write_seqlock(&xtime_lock);
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do {
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#ifndef CONFIG_SMP
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profile_tick(CPU_PROFILING, regs);
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update_process_times(user_mode(regs));
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#endif
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do_timer(regs);
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/* Guarantee that the following sequences execute
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* uninterrupted.
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*/
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__asm__ __volatile__("rdpr %%pstate, %0\n\t"
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"wrpr %0, %1, %%pstate"
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: "=r" (pstate)
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: "i" (PSTATE_IE));
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compare = tick_ops->add_compare(timer_tick_offset);
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ticks = tick_ops->get_tick();
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/* Restore PSTATE_IE. */
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__asm__ __volatile__("wrpr %0, 0x0, %%pstate"
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: /* no outputs */
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: "r" (pstate));
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} while (time_after_eq(ticks, compare));
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timer_check_rtc();
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_SMP
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void timer_tick_interrupt(struct pt_regs *regs)
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{
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write_seqlock(&xtime_lock);
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|
|
do_timer(regs);
|
|
|
|
timer_check_rtc();
|
|
|
|
write_sequnlock(&xtime_lock);
|
|
}
|
|
#endif
|
|
|
|
/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
|
|
static void __init kick_start_clock(void)
|
|
{
|
|
void __iomem *regs = mstk48t02_regs;
|
|
u8 sec, tmp;
|
|
int i, count;
|
|
|
|
prom_printf("CLOCK: Clock was stopped. Kick start ");
|
|
|
|
spin_lock_irq(&mostek_lock);
|
|
|
|
/* Turn on the kick start bit to start the oscillator. */
|
|
tmp = mostek_read(regs + MOSTEK_CREG);
|
|
tmp |= MSTK_CREG_WRITE;
|
|
mostek_write(regs + MOSTEK_CREG, tmp);
|
|
tmp = mostek_read(regs + MOSTEK_SEC);
|
|
tmp &= ~MSTK_STOP;
|
|
mostek_write(regs + MOSTEK_SEC, tmp);
|
|
tmp = mostek_read(regs + MOSTEK_HOUR);
|
|
tmp |= MSTK_KICK_START;
|
|
mostek_write(regs + MOSTEK_HOUR, tmp);
|
|
tmp = mostek_read(regs + MOSTEK_CREG);
|
|
tmp &= ~MSTK_CREG_WRITE;
|
|
mostek_write(regs + MOSTEK_CREG, tmp);
|
|
|
|
spin_unlock_irq(&mostek_lock);
|
|
|
|
/* Delay to allow the clock oscillator to start. */
|
|
sec = MSTK_REG_SEC(regs);
|
|
for (i = 0; i < 3; i++) {
|
|
while (sec == MSTK_REG_SEC(regs))
|
|
for (count = 0; count < 100000; count++)
|
|
/* nothing */ ;
|
|
prom_printf(".");
|
|
sec = MSTK_REG_SEC(regs);
|
|
}
|
|
prom_printf("\n");
|
|
|
|
spin_lock_irq(&mostek_lock);
|
|
|
|
/* Turn off kick start and set a "valid" time and date. */
|
|
tmp = mostek_read(regs + MOSTEK_CREG);
|
|
tmp |= MSTK_CREG_WRITE;
|
|
mostek_write(regs + MOSTEK_CREG, tmp);
|
|
tmp = mostek_read(regs + MOSTEK_HOUR);
|
|
tmp &= ~MSTK_KICK_START;
|
|
mostek_write(regs + MOSTEK_HOUR, tmp);
|
|
MSTK_SET_REG_SEC(regs,0);
|
|
MSTK_SET_REG_MIN(regs,0);
|
|
MSTK_SET_REG_HOUR(regs,0);
|
|
MSTK_SET_REG_DOW(regs,5);
|
|
MSTK_SET_REG_DOM(regs,1);
|
|
MSTK_SET_REG_MONTH(regs,8);
|
|
MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
|
|
tmp = mostek_read(regs + MOSTEK_CREG);
|
|
tmp &= ~MSTK_CREG_WRITE;
|
|
mostek_write(regs + MOSTEK_CREG, tmp);
|
|
|
|
spin_unlock_irq(&mostek_lock);
|
|
|
|
/* Ensure the kick start bit is off. If it isn't, turn it off. */
|
|
while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
|
|
prom_printf("CLOCK: Kick start still on!\n");
|
|
|
|
spin_lock_irq(&mostek_lock);
|
|
|
|
tmp = mostek_read(regs + MOSTEK_CREG);
|
|
tmp |= MSTK_CREG_WRITE;
|
|
mostek_write(regs + MOSTEK_CREG, tmp);
|
|
|
|
tmp = mostek_read(regs + MOSTEK_HOUR);
|
|
tmp &= ~MSTK_KICK_START;
|
|
mostek_write(regs + MOSTEK_HOUR, tmp);
|
|
|
|
tmp = mostek_read(regs + MOSTEK_CREG);
|
|
tmp &= ~MSTK_CREG_WRITE;
|
|
mostek_write(regs + MOSTEK_CREG, tmp);
|
|
|
|
spin_unlock_irq(&mostek_lock);
|
|
}
|
|
|
|
prom_printf("CLOCK: Kick start procedure successful.\n");
|
|
}
|
|
|
|
/* Return nonzero if the clock chip battery is low. */
|
|
static int __init has_low_battery(void)
|
|
{
|
|
void __iomem *regs = mstk48t02_regs;
|
|
u8 data1, data2;
|
|
|
|
spin_lock_irq(&mostek_lock);
|
|
|
|
data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
|
|
mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
|
|
data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
|
|
mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
|
|
|
|
spin_unlock_irq(&mostek_lock);
|
|
|
|
return (data1 == data2); /* Was the write blocked? */
|
|
}
|
|
|
|
/* Probe for the real time clock chip. */
|
|
static void __init set_system_time(void)
|
|
{
|
|
unsigned int year, mon, day, hour, min, sec;
|
|
void __iomem *mregs = mstk48t02_regs;
|
|
#ifdef CONFIG_PCI
|
|
unsigned long dregs = ds1287_regs;
|
|
#else
|
|
unsigned long dregs = 0UL;
|
|
#endif
|
|
u8 tmp;
|
|
|
|
if (!mregs && !dregs) {
|
|
prom_printf("Something wrong, clock regs not mapped yet.\n");
|
|
prom_halt();
|
|
}
|
|
|
|
if (mregs) {
|
|
spin_lock_irq(&mostek_lock);
|
|
|
|
/* Traditional Mostek chip. */
|
|
tmp = mostek_read(mregs + MOSTEK_CREG);
|
|
tmp |= MSTK_CREG_READ;
|
|
mostek_write(mregs + MOSTEK_CREG, tmp);
|
|
|
|
sec = MSTK_REG_SEC(mregs);
|
|
min = MSTK_REG_MIN(mregs);
|
|
hour = MSTK_REG_HOUR(mregs);
|
|
day = MSTK_REG_DOM(mregs);
|
|
mon = MSTK_REG_MONTH(mregs);
|
|
year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
|
|
} else {
|
|
/* Dallas 12887 RTC chip. */
|
|
|
|
do {
|
|
sec = CMOS_READ(RTC_SECONDS);
|
|
min = CMOS_READ(RTC_MINUTES);
|
|
hour = CMOS_READ(RTC_HOURS);
|
|
day = CMOS_READ(RTC_DAY_OF_MONTH);
|
|
mon = CMOS_READ(RTC_MONTH);
|
|
year = CMOS_READ(RTC_YEAR);
|
|
} while (sec != CMOS_READ(RTC_SECONDS));
|
|
|
|
if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
|
|
BCD_TO_BIN(sec);
|
|
BCD_TO_BIN(min);
|
|
BCD_TO_BIN(hour);
|
|
BCD_TO_BIN(day);
|
|
BCD_TO_BIN(mon);
|
|
BCD_TO_BIN(year);
|
|
}
|
|
if ((year += 1900) < 1970)
|
|
year += 100;
|
|
}
|
|
|
|
xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
|
|
xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
|
|
set_normalized_timespec(&wall_to_monotonic,
|
|
-xtime.tv_sec, -xtime.tv_nsec);
|
|
|
|
if (mregs) {
|
|
tmp = mostek_read(mregs + MOSTEK_CREG);
|
|
tmp &= ~MSTK_CREG_READ;
|
|
mostek_write(mregs + MOSTEK_CREG, tmp);
|
|
|
|
spin_unlock_irq(&mostek_lock);
|
|
}
|
|
}
|
|
|
|
/* davem suggests we keep this within the 4M locked kernel image */
|
|
static u32 starfire_get_time(void)
|
|
{
|
|
static char obp_gettod[32];
|
|
static u32 unix_tod;
|
|
|
|
sprintf(obp_gettod, "h# %08x unix-gettod",
|
|
(unsigned int) (long) &unix_tod);
|
|
prom_feval(obp_gettod);
|
|
|
|
return unix_tod;
|
|
}
|
|
|
|
static int starfire_set_time(u32 val)
|
|
{
|
|
/* Do nothing, time is set using the service processor
|
|
* console on this platform.
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
static u32 hypervisor_get_time(void)
|
|
{
|
|
register unsigned long func asm("%o5");
|
|
register unsigned long arg0 asm("%o0");
|
|
register unsigned long arg1 asm("%o1");
|
|
int retries = 10000;
|
|
|
|
retry:
|
|
func = HV_FAST_TOD_GET;
|
|
arg0 = 0;
|
|
arg1 = 0;
|
|
__asm__ __volatile__("ta %6"
|
|
: "=&r" (func), "=&r" (arg0), "=&r" (arg1)
|
|
: "0" (func), "1" (arg0), "2" (arg1),
|
|
"i" (HV_FAST_TRAP));
|
|
if (arg0 == HV_EOK)
|
|
return arg1;
|
|
if (arg0 == HV_EWOULDBLOCK) {
|
|
if (--retries > 0) {
|
|
udelay(100);
|
|
goto retry;
|
|
}
|
|
printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
|
|
return 0;
|
|
}
|
|
printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
|
|
return 0;
|
|
}
|
|
|
|
static int hypervisor_set_time(u32 secs)
|
|
{
|
|
register unsigned long func asm("%o5");
|
|
register unsigned long arg0 asm("%o0");
|
|
int retries = 10000;
|
|
|
|
retry:
|
|
func = HV_FAST_TOD_SET;
|
|
arg0 = secs;
|
|
__asm__ __volatile__("ta %4"
|
|
: "=&r" (func), "=&r" (arg0)
|
|
: "0" (func), "1" (arg0),
|
|
"i" (HV_FAST_TRAP));
|
|
if (arg0 == HV_EOK)
|
|
return 0;
|
|
if (arg0 == HV_EWOULDBLOCK) {
|
|
if (--retries > 0) {
|
|
udelay(100);
|
|
goto retry;
|
|
}
|
|
printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
|
|
return -EAGAIN;
|
|
}
|
|
printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
static int __init clock_model_matches(char *model)
|
|
{
|
|
if (strcmp(model, "mk48t02") &&
|
|
strcmp(model, "mk48t08") &&
|
|
strcmp(model, "mk48t59") &&
|
|
strcmp(model, "m5819") &&
|
|
strcmp(model, "m5819p") &&
|
|
strcmp(model, "m5823") &&
|
|
strcmp(model, "ds1287"))
|
|
return 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void __init __clock_assign_common(void __iomem *addr, char *model)
|
|
{
|
|
if (model[5] == '0' && model[6] == '2') {
|
|
mstk48t02_regs = addr;
|
|
} else if(model[5] == '0' && model[6] == '8') {
|
|
mstk48t08_regs = addr;
|
|
mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
|
|
} else {
|
|
mstk48t59_regs = addr;
|
|
mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
|
|
}
|
|
}
|
|
|
|
static void __init clock_assign_clk_reg(struct linux_prom_registers *clk_reg,
|
|
char *model)
|
|
{
|
|
unsigned long addr;
|
|
|
|
addr = ((unsigned long) clk_reg[0].phys_addr |
|
|
(((unsigned long) clk_reg[0].which_io) << 32UL));
|
|
|
|
__clock_assign_common((void __iomem *) addr, model);
|
|
}
|
|
|
|
static int __init clock_probe_central(void)
|
|
{
|
|
struct linux_prom_registers clk_reg[2], *pr;
|
|
struct device_node *dp;
|
|
char *model;
|
|
|
|
if (!central_bus)
|
|
return 0;
|
|
|
|
/* Get Central FHC's prom node. */
|
|
dp = central_bus->child->prom_node;
|
|
|
|
/* Then get the first child device below it. */
|
|
dp = dp->child;
|
|
|
|
while (dp) {
|
|
model = of_get_property(dp, "model", NULL);
|
|
if (!model || !clock_model_matches(model))
|
|
goto next_sibling;
|
|
|
|
pr = of_get_property(dp, "reg", NULL);
|
|
memcpy(clk_reg, pr, sizeof(clk_reg));
|
|
|
|
apply_fhc_ranges(central_bus->child, clk_reg, 1);
|
|
apply_central_ranges(central_bus, clk_reg, 1);
|
|
|
|
clock_assign_clk_reg(clk_reg, model);
|
|
return 1;
|
|
|
|
next_sibling:
|
|
dp = dp->sibling;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PCI
|
|
static void __init clock_isa_ebus_assign_regs(struct resource *res, char *model)
|
|
{
|
|
if (!strcmp(model, "ds1287") ||
|
|
!strcmp(model, "m5819") ||
|
|
!strcmp(model, "m5819p") ||
|
|
!strcmp(model, "m5823")) {
|
|
ds1287_regs = res->start;
|
|
} else {
|
|
mstk48t59_regs = (void __iomem *) res->start;
|
|
mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
|
|
}
|
|
}
|
|
|
|
static int __init clock_probe_one_ebus_dev(struct linux_ebus_device *edev)
|
|
{
|
|
struct device_node *dp = edev->prom_node;
|
|
char *model;
|
|
|
|
model = of_get_property(dp, "model", NULL);
|
|
if (!clock_model_matches(model))
|
|
return 0;
|
|
|
|
clock_isa_ebus_assign_regs(&edev->resource[0], model);
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int __init clock_probe_ebus(void)
|
|
{
|
|
struct linux_ebus *ebus;
|
|
|
|
for_each_ebus(ebus) {
|
|
struct linux_ebus_device *edev;
|
|
|
|
for_each_ebusdev(edev, ebus) {
|
|
if (clock_probe_one_ebus_dev(edev))
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init clock_probe_one_isa_dev(struct sparc_isa_device *idev)
|
|
{
|
|
struct device_node *dp = idev->prom_node;
|
|
char *model;
|
|
|
|
model = of_get_property(dp, "model", NULL);
|
|
if (!clock_model_matches(model))
|
|
return 0;
|
|
|
|
clock_isa_ebus_assign_regs(&idev->resource, model);
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int __init clock_probe_isa(void)
|
|
{
|
|
struct sparc_isa_bridge *isa_br;
|
|
|
|
for_each_isa(isa_br) {
|
|
struct sparc_isa_device *isa_dev;
|
|
|
|
for_each_isadev(isa_dev, isa_br) {
|
|
if (clock_probe_one_isa_dev(isa_dev))
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PCI */
|
|
|
|
#ifdef CONFIG_SBUS
|
|
static int __init clock_probe_one_sbus_dev(struct sbus_bus *sbus, struct sbus_dev *sdev)
|
|
{
|
|
struct resource *res;
|
|
char model[64];
|
|
void __iomem *addr;
|
|
|
|
prom_getstring(sdev->prom_node, "model", model, sizeof(model));
|
|
if (!clock_model_matches(model))
|
|
return 0;
|
|
|
|
res = &sdev->resource[0];
|
|
addr = sbus_ioremap(res, 0, 0x800UL, "eeprom");
|
|
|
|
__clock_assign_common(addr, model);
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int __init clock_probe_sbus(void)
|
|
{
|
|
struct sbus_bus *sbus;
|
|
|
|
for_each_sbus(sbus) {
|
|
struct sbus_dev *sdev;
|
|
|
|
for_each_sbusdev(sdev, sbus) {
|
|
if (clock_probe_one_sbus_dev(sbus, sdev))
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
void __init clock_probe(void)
|
|
{
|
|
static int invoked;
|
|
unsigned long flags;
|
|
|
|
if (invoked)
|
|
return;
|
|
invoked = 1;
|
|
|
|
if (this_is_starfire) {
|
|
xtime.tv_sec = starfire_get_time();
|
|
xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
|
|
set_normalized_timespec(&wall_to_monotonic,
|
|
-xtime.tv_sec, -xtime.tv_nsec);
|
|
return;
|
|
}
|
|
if (tlb_type == hypervisor) {
|
|
xtime.tv_sec = hypervisor_get_time();
|
|
xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
|
|
set_normalized_timespec(&wall_to_monotonic,
|
|
-xtime.tv_sec, -xtime.tv_nsec);
|
|
return;
|
|
}
|
|
|
|
/* Check FHC Central then EBUSs then ISA bridges then SBUSs.
|
|
* That way we handle the presence of multiple properly.
|
|
*
|
|
* As a special case, machines with Central must provide the
|
|
* timer chip there.
|
|
*/
|
|
if (!clock_probe_central() &&
|
|
#ifdef CONFIG_PCI
|
|
!clock_probe_ebus() &&
|
|
!clock_probe_isa() &&
|
|
#endif
|
|
#ifdef CONFIG_SBUS
|
|
!clock_probe_sbus()
|
|
#endif
|
|
) {
|
|
printk(KERN_WARNING "No clock chip found.\n");
|
|
return;
|
|
}
|
|
|
|
local_irq_save(flags);
|
|
|
|
if (mstk48t02_regs != NULL) {
|
|
/* Report a low battery voltage condition. */
|
|
if (has_low_battery())
|
|
prom_printf("NVRAM: Low battery voltage!\n");
|
|
|
|
/* Kick start the clock if it is completely stopped. */
|
|
if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
|
|
kick_start_clock();
|
|
}
|
|
|
|
set_system_time();
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
/* This is gets the master TICK_INT timer going. */
|
|
static unsigned long sparc64_init_timers(void)
|
|
{
|
|
struct device_node *dp;
|
|
struct property *prop;
|
|
unsigned long clock;
|
|
#ifdef CONFIG_SMP
|
|
extern void smp_tick_init(void);
|
|
#endif
|
|
|
|
dp = of_find_node_by_path("/");
|
|
if (tlb_type == spitfire) {
|
|
unsigned long ver, manuf, impl;
|
|
|
|
__asm__ __volatile__ ("rdpr %%ver, %0"
|
|
: "=&r" (ver));
|
|
manuf = ((ver >> 48) & 0xffff);
|
|
impl = ((ver >> 32) & 0xffff);
|
|
if (manuf == 0x17 && impl == 0x13) {
|
|
/* Hummingbird, aka Ultra-IIe */
|
|
tick_ops = &hbtick_operations;
|
|
prop = of_find_property(dp, "stick-frequency", NULL);
|
|
} else {
|
|
tick_ops = &tick_operations;
|
|
cpu_find_by_instance(0, &dp, NULL);
|
|
prop = of_find_property(dp, "clock-frequency", NULL);
|
|
}
|
|
} else {
|
|
tick_ops = &stick_operations;
|
|
prop = of_find_property(dp, "stick-frequency", NULL);
|
|
}
|
|
clock = *(unsigned int *) prop->value;
|
|
timer_tick_offset = clock / HZ;
|
|
|
|
#ifdef CONFIG_SMP
|
|
smp_tick_init();
|
|
#endif
|
|
|
|
return clock;
|
|
}
|
|
|
|
static void sparc64_start_timers(void)
|
|
{
|
|
unsigned long pstate;
|
|
|
|
/* Guarantee that the following sequences execute
|
|
* uninterrupted.
|
|
*/
|
|
__asm__ __volatile__("rdpr %%pstate, %0\n\t"
|
|
"wrpr %0, %1, %%pstate"
|
|
: "=r" (pstate)
|
|
: "i" (PSTATE_IE));
|
|
|
|
tick_ops->init_tick(timer_tick_offset);
|
|
|
|
/* Restore PSTATE_IE. */
|
|
__asm__ __volatile__("wrpr %0, 0x0, %%pstate"
|
|
: /* no outputs */
|
|
: "r" (pstate));
|
|
|
|
local_irq_enable();
|
|
}
|
|
|
|
struct freq_table {
|
|
unsigned long clock_tick_ref;
|
|
unsigned int ref_freq;
|
|
};
|
|
static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
|
|
|
|
unsigned long sparc64_get_clock_tick(unsigned int cpu)
|
|
{
|
|
struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
|
|
|
|
if (ft->clock_tick_ref)
|
|
return ft->clock_tick_ref;
|
|
return cpu_data(cpu).clock_tick;
|
|
}
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
|
|
void *data)
|
|
{
|
|
struct cpufreq_freqs *freq = data;
|
|
unsigned int cpu = freq->cpu;
|
|
struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
|
|
|
|
if (!ft->ref_freq) {
|
|
ft->ref_freq = freq->old;
|
|
ft->clock_tick_ref = cpu_data(cpu).clock_tick;
|
|
}
|
|
if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
|
|
(val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
|
|
(val == CPUFREQ_RESUMECHANGE)) {
|
|
cpu_data(cpu).clock_tick =
|
|
cpufreq_scale(ft->clock_tick_ref,
|
|
ft->ref_freq,
|
|
freq->new);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct notifier_block sparc64_cpufreq_notifier_block = {
|
|
.notifier_call = sparc64_cpufreq_notifier
|
|
};
|
|
|
|
#endif /* CONFIG_CPU_FREQ */
|
|
|
|
static struct time_interpolator sparc64_cpu_interpolator = {
|
|
.source = TIME_SOURCE_CPU,
|
|
.shift = 16,
|
|
.mask = 0xffffffffffffffffLL
|
|
};
|
|
|
|
/* The quotient formula is taken from the IA64 port. */
|
|
#define SPARC64_NSEC_PER_CYC_SHIFT 30UL
|
|
void __init time_init(void)
|
|
{
|
|
unsigned long clock = sparc64_init_timers();
|
|
|
|
sparc64_cpu_interpolator.frequency = clock;
|
|
register_time_interpolator(&sparc64_cpu_interpolator);
|
|
|
|
/* Now that the interpolator is registered, it is
|
|
* safe to start the timer ticking.
|
|
*/
|
|
sparc64_start_timers();
|
|
|
|
timer_ticks_per_nsec_quotient =
|
|
(((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
|
|
(clock / 2)) / clock);
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
#endif
|
|
}
|
|
|
|
unsigned long long sched_clock(void)
|
|
{
|
|
unsigned long ticks = tick_ops->get_tick();
|
|
|
|
return (ticks * timer_ticks_per_nsec_quotient)
|
|
>> SPARC64_NSEC_PER_CYC_SHIFT;
|
|
}
|
|
|
|
static int set_rtc_mmss(unsigned long nowtime)
|
|
{
|
|
int real_seconds, real_minutes, chip_minutes;
|
|
void __iomem *mregs = mstk48t02_regs;
|
|
#ifdef CONFIG_PCI
|
|
unsigned long dregs = ds1287_regs;
|
|
#else
|
|
unsigned long dregs = 0UL;
|
|
#endif
|
|
unsigned long flags;
|
|
u8 tmp;
|
|
|
|
/*
|
|
* Not having a register set can lead to trouble.
|
|
* Also starfire doesn't have a tod clock.
|
|
*/
|
|
if (!mregs && !dregs)
|
|
return -1;
|
|
|
|
if (mregs) {
|
|
spin_lock_irqsave(&mostek_lock, flags);
|
|
|
|
/* Read the current RTC minutes. */
|
|
tmp = mostek_read(mregs + MOSTEK_CREG);
|
|
tmp |= MSTK_CREG_READ;
|
|
mostek_write(mregs + MOSTEK_CREG, tmp);
|
|
|
|
chip_minutes = MSTK_REG_MIN(mregs);
|
|
|
|
tmp = mostek_read(mregs + MOSTEK_CREG);
|
|
tmp &= ~MSTK_CREG_READ;
|
|
mostek_write(mregs + MOSTEK_CREG, tmp);
|
|
|
|
/*
|
|
* since we're only adjusting minutes and seconds,
|
|
* don't interfere with hour overflow. This avoids
|
|
* messing with unknown time zones but requires your
|
|
* RTC not to be off by more than 15 minutes
|
|
*/
|
|
real_seconds = nowtime % 60;
|
|
real_minutes = nowtime / 60;
|
|
if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
|
|
real_minutes += 30; /* correct for half hour time zone */
|
|
real_minutes %= 60;
|
|
|
|
if (abs(real_minutes - chip_minutes) < 30) {
|
|
tmp = mostek_read(mregs + MOSTEK_CREG);
|
|
tmp |= MSTK_CREG_WRITE;
|
|
mostek_write(mregs + MOSTEK_CREG, tmp);
|
|
|
|
MSTK_SET_REG_SEC(mregs,real_seconds);
|
|
MSTK_SET_REG_MIN(mregs,real_minutes);
|
|
|
|
tmp = mostek_read(mregs + MOSTEK_CREG);
|
|
tmp &= ~MSTK_CREG_WRITE;
|
|
mostek_write(mregs + MOSTEK_CREG, tmp);
|
|
|
|
spin_unlock_irqrestore(&mostek_lock, flags);
|
|
|
|
return 0;
|
|
} else {
|
|
spin_unlock_irqrestore(&mostek_lock, flags);
|
|
|
|
return -1;
|
|
}
|
|
} else {
|
|
int retval = 0;
|
|
unsigned char save_control, save_freq_select;
|
|
|
|
/* Stolen from arch/i386/kernel/time.c, see there for
|
|
* credits and descriptive comments.
|
|
*/
|
|
spin_lock_irqsave(&rtc_lock, flags);
|
|
save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
|
|
CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
|
|
|
|
save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
|
|
CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
|
|
|
|
chip_minutes = CMOS_READ(RTC_MINUTES);
|
|
if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
|
|
BCD_TO_BIN(chip_minutes);
|
|
real_seconds = nowtime % 60;
|
|
real_minutes = nowtime / 60;
|
|
if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
|
|
real_minutes += 30;
|
|
real_minutes %= 60;
|
|
|
|
if (abs(real_minutes - chip_minutes) < 30) {
|
|
if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
|
|
BIN_TO_BCD(real_seconds);
|
|
BIN_TO_BCD(real_minutes);
|
|
}
|
|
CMOS_WRITE(real_seconds,RTC_SECONDS);
|
|
CMOS_WRITE(real_minutes,RTC_MINUTES);
|
|
} else {
|
|
printk(KERN_WARNING
|
|
"set_rtc_mmss: can't update from %d to %d\n",
|
|
chip_minutes, real_minutes);
|
|
retval = -1;
|
|
}
|
|
|
|
CMOS_WRITE(save_control, RTC_CONTROL);
|
|
CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
|
|
spin_unlock_irqrestore(&rtc_lock, flags);
|
|
|
|
return retval;
|
|
}
|
|
}
|
|
|
|
#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
|
|
static unsigned char mini_rtc_status; /* bitmapped status byte. */
|
|
|
|
/* months start at 0 now */
|
|
static unsigned char days_in_mo[] =
|
|
{31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
|
|
|
|
#define FEBRUARY 2
|
|
#define STARTOFTIME 1970
|
|
#define SECDAY 86400L
|
|
#define SECYR (SECDAY * 365)
|
|
#define leapyear(year) ((year) % 4 == 0 && \
|
|
((year) % 100 != 0 || (year) % 400 == 0))
|
|
#define days_in_year(a) (leapyear(a) ? 366 : 365)
|
|
#define days_in_month(a) (month_days[(a) - 1])
|
|
|
|
static int month_days[12] = {
|
|
31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
|
|
};
|
|
|
|
/*
|
|
* This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
|
|
*/
|
|
static void GregorianDay(struct rtc_time * tm)
|
|
{
|
|
int leapsToDate;
|
|
int lastYear;
|
|
int day;
|
|
int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
|
|
|
|
lastYear = tm->tm_year - 1;
|
|
|
|
/*
|
|
* Number of leap corrections to apply up to end of last year
|
|
*/
|
|
leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
|
|
|
|
/*
|
|
* This year is a leap year if it is divisible by 4 except when it is
|
|
* divisible by 100 unless it is divisible by 400
|
|
*
|
|
* e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
|
|
*/
|
|
day = tm->tm_mon > 2 && leapyear(tm->tm_year);
|
|
|
|
day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
|
|
tm->tm_mday;
|
|
|
|
tm->tm_wday = day % 7;
|
|
}
|
|
|
|
static void to_tm(int tim, struct rtc_time *tm)
|
|
{
|
|
register int i;
|
|
register long hms, day;
|
|
|
|
day = tim / SECDAY;
|
|
hms = tim % SECDAY;
|
|
|
|
/* Hours, minutes, seconds are easy */
|
|
tm->tm_hour = hms / 3600;
|
|
tm->tm_min = (hms % 3600) / 60;
|
|
tm->tm_sec = (hms % 3600) % 60;
|
|
|
|
/* Number of years in days */
|
|
for (i = STARTOFTIME; day >= days_in_year(i); i++)
|
|
day -= days_in_year(i);
|
|
tm->tm_year = i;
|
|
|
|
/* Number of months in days left */
|
|
if (leapyear(tm->tm_year))
|
|
days_in_month(FEBRUARY) = 29;
|
|
for (i = 1; day >= days_in_month(i); i++)
|
|
day -= days_in_month(i);
|
|
days_in_month(FEBRUARY) = 28;
|
|
tm->tm_mon = i;
|
|
|
|
/* Days are what is left over (+1) from all that. */
|
|
tm->tm_mday = day + 1;
|
|
|
|
/*
|
|
* Determine the day of week
|
|
*/
|
|
GregorianDay(tm);
|
|
}
|
|
|
|
/* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
|
|
* aka Unix time. So we have to convert to/from rtc_time.
|
|
*/
|
|
static inline void mini_get_rtc_time(struct rtc_time *time)
|
|
{
|
|
unsigned long flags;
|
|
u32 seconds;
|
|
|
|
spin_lock_irqsave(&rtc_lock, flags);
|
|
seconds = 0;
|
|
if (this_is_starfire)
|
|
seconds = starfire_get_time();
|
|
else if (tlb_type == hypervisor)
|
|
seconds = hypervisor_get_time();
|
|
spin_unlock_irqrestore(&rtc_lock, flags);
|
|
|
|
to_tm(seconds, time);
|
|
time->tm_year -= 1900;
|
|
time->tm_mon -= 1;
|
|
}
|
|
|
|
static inline int mini_set_rtc_time(struct rtc_time *time)
|
|
{
|
|
u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
|
|
time->tm_mday, time->tm_hour,
|
|
time->tm_min, time->tm_sec);
|
|
unsigned long flags;
|
|
int err;
|
|
|
|
spin_lock_irqsave(&rtc_lock, flags);
|
|
err = -ENODEV;
|
|
if (this_is_starfire)
|
|
err = starfire_set_time(seconds);
|
|
else if (tlb_type == hypervisor)
|
|
err = hypervisor_set_time(seconds);
|
|
spin_unlock_irqrestore(&rtc_lock, flags);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int mini_rtc_ioctl(struct inode *inode, struct file *file,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
struct rtc_time wtime;
|
|
void __user *argp = (void __user *)arg;
|
|
|
|
switch (cmd) {
|
|
|
|
case RTC_PLL_GET:
|
|
return -EINVAL;
|
|
|
|
case RTC_PLL_SET:
|
|
return -EINVAL;
|
|
|
|
case RTC_UIE_OFF: /* disable ints from RTC updates. */
|
|
return 0;
|
|
|
|
case RTC_UIE_ON: /* enable ints for RTC updates. */
|
|
return -EINVAL;
|
|
|
|
case RTC_RD_TIME: /* Read the time/date from RTC */
|
|
/* this doesn't get week-day, who cares */
|
|
memset(&wtime, 0, sizeof(wtime));
|
|
mini_get_rtc_time(&wtime);
|
|
|
|
return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
|
|
|
|
case RTC_SET_TIME: /* Set the RTC */
|
|
{
|
|
int year;
|
|
unsigned char leap_yr;
|
|
|
|
if (!capable(CAP_SYS_TIME))
|
|
return -EACCES;
|
|
|
|
if (copy_from_user(&wtime, argp, sizeof(wtime)))
|
|
return -EFAULT;
|
|
|
|
year = wtime.tm_year + 1900;
|
|
leap_yr = ((!(year % 4) && (year % 100)) ||
|
|
!(year % 400));
|
|
|
|
if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
|
|
return -EINVAL;
|
|
|
|
if (wtime.tm_mday < 0 || wtime.tm_mday >
|
|
(days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
|
|
return -EINVAL;
|
|
|
|
if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
|
|
wtime.tm_min < 0 || wtime.tm_min >= 60 ||
|
|
wtime.tm_sec < 0 || wtime.tm_sec >= 60)
|
|
return -EINVAL;
|
|
|
|
return mini_set_rtc_time(&wtime);
|
|
}
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int mini_rtc_open(struct inode *inode, struct file *file)
|
|
{
|
|
if (mini_rtc_status & RTC_IS_OPEN)
|
|
return -EBUSY;
|
|
|
|
mini_rtc_status |= RTC_IS_OPEN;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mini_rtc_release(struct inode *inode, struct file *file)
|
|
{
|
|
mini_rtc_status &= ~RTC_IS_OPEN;
|
|
return 0;
|
|
}
|
|
|
|
|
|
static struct file_operations mini_rtc_fops = {
|
|
.owner = THIS_MODULE,
|
|
.ioctl = mini_rtc_ioctl,
|
|
.open = mini_rtc_open,
|
|
.release = mini_rtc_release,
|
|
};
|
|
|
|
static struct miscdevice rtc_mini_dev =
|
|
{
|
|
.minor = RTC_MINOR,
|
|
.name = "rtc",
|
|
.fops = &mini_rtc_fops,
|
|
};
|
|
|
|
static int __init rtc_mini_init(void)
|
|
{
|
|
int retval;
|
|
|
|
if (tlb_type != hypervisor && !this_is_starfire)
|
|
return -ENODEV;
|
|
|
|
printk(KERN_INFO "Mini RTC Driver\n");
|
|
|
|
retval = misc_register(&rtc_mini_dev);
|
|
if (retval < 0)
|
|
return retval;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit rtc_mini_exit(void)
|
|
{
|
|
misc_deregister(&rtc_mini_dev);
|
|
}
|
|
|
|
|
|
module_init(rtc_mini_init);
|
|
module_exit(rtc_mini_exit);
|