457 lines
11 KiB
C
457 lines
11 KiB
C
/* $Id: central.c,v 1.15 2001/12/19 00:29:51 davem Exp $
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* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
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*
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* Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com)
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <asm/page.h>
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#include <asm/fhc.h>
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#include <asm/starfire.h>
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struct linux_central *central_bus = NULL;
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struct linux_fhc *fhc_list = NULL;
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#define IS_CENTRAL_FHC(__fhc) ((__fhc) == central_bus->child)
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static void central_probe_failure(int line)
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{
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prom_printf("CENTRAL: Critical device probe failure at central.c:%d\n",
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line);
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prom_halt();
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}
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static void central_ranges_init(struct linux_central *central)
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{
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struct device_node *dp = central->prom_node;
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void *pval;
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int len;
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central->num_central_ranges = 0;
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pval = of_get_property(dp, "ranges", &len);
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if (pval) {
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memcpy(central->central_ranges, pval, len);
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central->num_central_ranges =
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(len / sizeof(struct linux_prom_ranges));
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}
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}
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static void fhc_ranges_init(struct linux_fhc *fhc)
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{
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struct device_node *dp = fhc->prom_node;
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void *pval;
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int len;
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fhc->num_fhc_ranges = 0;
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pval = of_get_property(dp, "ranges", &len);
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if (pval) {
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memcpy(fhc->fhc_ranges, pval, len);
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fhc->num_fhc_ranges =
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(len / sizeof(struct linux_prom_ranges));
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}
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}
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/* Range application routines are exported to various drivers,
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* so do not __init this.
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*/
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static void adjust_regs(struct linux_prom_registers *regp, int nregs,
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struct linux_prom_ranges *rangep, int nranges)
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{
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int regc, rngc;
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for (regc = 0; regc < nregs; regc++) {
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for (rngc = 0; rngc < nranges; rngc++)
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if (regp[regc].which_io == rangep[rngc].ot_child_space)
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break; /* Fount it */
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if (rngc == nranges) /* oops */
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central_probe_failure(__LINE__);
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regp[regc].which_io = rangep[rngc].ot_parent_space;
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regp[regc].phys_addr -= rangep[rngc].ot_child_base;
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regp[regc].phys_addr += rangep[rngc].ot_parent_base;
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}
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}
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/* Apply probed fhc ranges to registers passed, if no ranges return. */
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void apply_fhc_ranges(struct linux_fhc *fhc,
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struct linux_prom_registers *regs,
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int nregs)
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{
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if (fhc->num_fhc_ranges)
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adjust_regs(regs, nregs, fhc->fhc_ranges,
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fhc->num_fhc_ranges);
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}
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/* Apply probed central ranges to registers passed, if no ranges return. */
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void apply_central_ranges(struct linux_central *central,
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struct linux_prom_registers *regs, int nregs)
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{
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if (central->num_central_ranges)
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adjust_regs(regs, nregs, central->central_ranges,
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central->num_central_ranges);
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}
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void * __init central_alloc_bootmem(unsigned long size)
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{
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void *ret;
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ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
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if (ret != NULL)
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memset(ret, 0, size);
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return ret;
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}
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static unsigned long prom_reg_to_paddr(struct linux_prom_registers *r)
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{
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unsigned long ret = ((unsigned long) r->which_io) << 32;
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return ret | (unsigned long) r->phys_addr;
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}
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static void probe_other_fhcs(void)
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{
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struct device_node *dp;
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struct linux_prom64_registers *fpregs;
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for_each_node_by_name(dp, "fhc") {
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struct linux_fhc *fhc;
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int board;
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u32 tmp;
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fhc = (struct linux_fhc *)
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central_alloc_bootmem(sizeof(struct linux_fhc));
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if (fhc == NULL)
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central_probe_failure(__LINE__);
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/* Link it into the FHC chain. */
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fhc->next = fhc_list;
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fhc_list = fhc;
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/* Toplevel FHCs have no parent. */
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fhc->parent = NULL;
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fhc->prom_node = dp;
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fhc_ranges_init(fhc);
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/* Non-central FHC's have 64-bit OBP format registers. */
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fpregs = of_get_property(dp, "reg", NULL);
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if (!fpregs)
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central_probe_failure(__LINE__);
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/* Only central FHC needs special ranges applied. */
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fhc->fhc_regs.pregs = fpregs[0].phys_addr;
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fhc->fhc_regs.ireg = fpregs[1].phys_addr;
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fhc->fhc_regs.ffregs = fpregs[2].phys_addr;
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fhc->fhc_regs.sregs = fpregs[3].phys_addr;
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fhc->fhc_regs.uregs = fpregs[4].phys_addr;
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fhc->fhc_regs.tregs = fpregs[5].phys_addr;
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board = of_getintprop_default(dp, "board#", -1);
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fhc->board = board;
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tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_JCTRL);
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if ((tmp & FHC_JTAG_CTRL_MENAB) != 0)
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fhc->jtag_master = 1;
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else
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fhc->jtag_master = 0;
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tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
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printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] %s\n",
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board,
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(tmp & FHC_ID_VERS) >> 28,
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(tmp & FHC_ID_PARTID) >> 12,
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(tmp & FHC_ID_MANUF) >> 1,
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(fhc->jtag_master ? "(JTAG Master)" : ""));
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/* This bit must be set in all non-central FHC's in
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* the system. When it is clear, this identifies
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* the central board.
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*/
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tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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tmp |= FHC_CONTROL_IXIST;
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upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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}
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}
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static void probe_clock_board(struct linux_central *central,
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struct linux_fhc *fhc,
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struct device_node *fp)
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{
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struct device_node *dp;
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struct linux_prom_registers cregs[3], *pr;
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int nslots, tmp, nregs;
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dp = fp->child;
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while (dp) {
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if (!strcmp(dp->name, "clock-board"))
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break;
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dp = dp->sibling;
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}
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if (!dp)
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central_probe_failure(__LINE__);
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pr = of_get_property(dp, "reg", &nregs);
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if (!pr)
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central_probe_failure(__LINE__);
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memcpy(cregs, pr, nregs);
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nregs /= sizeof(struct linux_prom_registers);
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apply_fhc_ranges(fhc, &cregs[0], nregs);
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apply_central_ranges(central, &cregs[0], nregs);
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central->cfreg = prom_reg_to_paddr(&cregs[0]);
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central->clkregs = prom_reg_to_paddr(&cregs[1]);
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if (nregs == 2)
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central->clkver = 0UL;
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else
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central->clkver = prom_reg_to_paddr(&cregs[2]);
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tmp = upa_readb(central->clkregs + CLOCK_STAT1);
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tmp &= 0xc0;
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switch(tmp) {
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case 0x40:
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nslots = 16;
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break;
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case 0xc0:
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nslots = 8;
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break;
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case 0x80:
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if (central->clkver != 0UL &&
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upa_readb(central->clkver) != 0) {
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if ((upa_readb(central->clkver) & 0x80) != 0)
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nslots = 4;
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else
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nslots = 5;
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break;
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}
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default:
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nslots = 4;
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break;
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};
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central->slots = nslots;
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printk("CENTRAL: Detected %d slot Enterprise system. cfreg[%02x] cver[%02x]\n",
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central->slots, upa_readb(central->cfreg),
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(central->clkver ? upa_readb(central->clkver) : 0x00));
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}
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static void ZAP(unsigned long iclr, unsigned long imap)
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{
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u32 imap_tmp;
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upa_writel(0, iclr);
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upa_readl(iclr);
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imap_tmp = upa_readl(imap);
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imap_tmp &= ~(0x80000000);
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upa_writel(imap_tmp, imap);
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upa_readl(imap);
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}
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static void init_all_fhc_hw(void)
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{
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struct linux_fhc *fhc;
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for (fhc = fhc_list; fhc != NULL; fhc = fhc->next) {
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u32 tmp;
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/* Clear all of the interrupt mapping registers
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* just in case OBP left them in a foul state.
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*/
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ZAP(fhc->fhc_regs.ffregs + FHC_FFREGS_ICLR,
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fhc->fhc_regs.ffregs + FHC_FFREGS_IMAP);
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ZAP(fhc->fhc_regs.sregs + FHC_SREGS_ICLR,
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fhc->fhc_regs.sregs + FHC_SREGS_IMAP);
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ZAP(fhc->fhc_regs.uregs + FHC_UREGS_ICLR,
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fhc->fhc_regs.uregs + FHC_UREGS_IMAP);
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ZAP(fhc->fhc_regs.tregs + FHC_TREGS_ICLR,
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fhc->fhc_regs.tregs + FHC_TREGS_IMAP);
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/* Setup FHC control register. */
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tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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/* All non-central boards have this bit set. */
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if (! IS_CENTRAL_FHC(fhc))
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tmp |= FHC_CONTROL_IXIST;
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/* For all FHCs, clear the firmware synchronization
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* line and both low power mode enables.
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*/
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tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF |
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FHC_CONTROL_SLINE);
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upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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}
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}
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void central_probe(void)
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{
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struct linux_prom_registers fpregs[6], *pr;
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struct linux_fhc *fhc;
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struct device_node *dp, *fp;
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int err;
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dp = of_find_node_by_name(NULL, "central");
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if (!dp) {
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if (this_is_starfire)
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starfire_cpu_setup();
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return;
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}
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/* Ok we got one, grab some memory for software state. */
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central_bus = (struct linux_central *)
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central_alloc_bootmem(sizeof(struct linux_central));
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if (central_bus == NULL)
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central_probe_failure(__LINE__);
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fhc = (struct linux_fhc *)
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central_alloc_bootmem(sizeof(struct linux_fhc));
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if (fhc == NULL)
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central_probe_failure(__LINE__);
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/* First init central. */
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central_bus->child = fhc;
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central_bus->prom_node = dp;
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central_ranges_init(central_bus);
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/* And then central's FHC. */
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fhc->next = fhc_list;
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fhc_list = fhc;
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fhc->parent = central_bus;
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fp = dp->child;
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while (fp) {
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if (!strcmp(fp->name, "fhc"))
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break;
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fp = fp->sibling;
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}
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if (!fp)
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central_probe_failure(__LINE__);
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fhc->prom_node = fp;
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fhc_ranges_init(fhc);
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/* Now, map in FHC register set. */
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pr = of_get_property(fp, "reg", NULL);
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if (!pr)
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central_probe_failure(__LINE__);
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memcpy(fpregs, pr, sizeof(fpregs));
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apply_central_ranges(central_bus, &fpregs[0], 6);
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fhc->fhc_regs.pregs = prom_reg_to_paddr(&fpregs[0]);
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fhc->fhc_regs.ireg = prom_reg_to_paddr(&fpregs[1]);
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fhc->fhc_regs.ffregs = prom_reg_to_paddr(&fpregs[2]);
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fhc->fhc_regs.sregs = prom_reg_to_paddr(&fpregs[3]);
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fhc->fhc_regs.uregs = prom_reg_to_paddr(&fpregs[4]);
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fhc->fhc_regs.tregs = prom_reg_to_paddr(&fpregs[5]);
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/* Obtain board number from board status register, Central's
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* FHC lacks "board#" property.
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*/
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err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_BSR);
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fhc->board = (((err >> 16) & 0x01) |
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((err >> 12) & 0x0e));
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fhc->jtag_master = 0;
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/* Attach the clock board registers for CENTRAL. */
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probe_clock_board(central_bus, fhc, fp);
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err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
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printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] (CENTRAL)\n",
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fhc->board,
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((err & FHC_ID_VERS) >> 28),
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((err & FHC_ID_PARTID) >> 12),
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((err & FHC_ID_MANUF) >> 1));
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probe_other_fhcs();
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init_all_fhc_hw();
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}
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static __inline__ void fhc_ledblink(struct linux_fhc *fhc, int on)
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{
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u32 tmp;
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tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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/* NOTE: reverse logic on this bit */
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if (on)
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tmp &= ~(FHC_CONTROL_RLED);
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else
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tmp |= FHC_CONTROL_RLED;
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tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF | FHC_CONTROL_SLINE);
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upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
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}
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static __inline__ void central_ledblink(struct linux_central *central, int on)
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{
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u8 tmp;
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tmp = upa_readb(central->clkregs + CLOCK_CTRL);
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/* NOTE: reverse logic on this bit */
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if (on)
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tmp &= ~(CLOCK_CTRL_RLED);
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else
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tmp |= CLOCK_CTRL_RLED;
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upa_writeb(tmp, central->clkregs + CLOCK_CTRL);
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upa_readb(central->clkregs + CLOCK_CTRL);
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}
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static struct timer_list sftimer;
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static int led_state;
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static void sunfire_timer(unsigned long __ignored)
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{
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struct linux_fhc *fhc;
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central_ledblink(central_bus, led_state);
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for (fhc = fhc_list; fhc != NULL; fhc = fhc->next)
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if (! IS_CENTRAL_FHC(fhc))
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fhc_ledblink(fhc, led_state);
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led_state = ! led_state;
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sftimer.expires = jiffies + (HZ >> 1);
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add_timer(&sftimer);
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}
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/* After PCI/SBUS busses have been probed, this is called to perform
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* final initialization of all FireHose Controllers in the system.
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*/
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void firetruck_init(void)
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{
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struct linux_central *central = central_bus;
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u8 ctrl;
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/* No central bus, nothing to do. */
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if (central == NULL)
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return;
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/* OBP leaves it on, turn it off so clock board timer LED
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* is in sync with FHC ones.
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*/
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ctrl = upa_readb(central->clkregs + CLOCK_CTRL);
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ctrl &= ~(CLOCK_CTRL_RLED);
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upa_writeb(ctrl, central->clkregs + CLOCK_CTRL);
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led_state = 0;
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init_timer(&sftimer);
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sftimer.data = 0;
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sftimer.function = &sunfire_timer;
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sftimer.expires = jiffies + (HZ >> 1);
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add_timer(&sftimer);
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}
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