0c30e0d31b
This patch adds definitions for some DM365 IRQs that are used by the codecs. Codecs will also use the IRQs. Entries are being added to enable/disable IRQ's. There is no use as such for these entires in the kernel itself. Instead these will be used by the "linuxutils" package of the DVSDK. For further information on IRQ muxing refer to http://focus.ti.com/lit/ug/sprufg5a/sprufg5a.pdf Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
409 lines
12 KiB
C
409 lines
12 KiB
C
/*
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* DaVinci interrupt controller definitions
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*
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* Copyright (C) 2006 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/* Base address */
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#define DAVINCI_ARM_INTC_BASE 0x01C48000
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#define DAVINCI_INTC_TYPE_AINTC 0
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#define DAVINCI_INTC_TYPE_CP_INTC 1
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/* Interrupt lines */
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#define IRQ_VDINT0 0
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#define IRQ_VDINT1 1
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#define IRQ_VDINT2 2
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#define IRQ_HISTINT 3
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#define IRQ_H3AINT 4
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#define IRQ_PRVUINT 5
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#define IRQ_RSZINT 6
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#define IRQ_VFOCINT 7
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#define IRQ_VENCINT 8
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#define IRQ_ASQINT 9
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#define IRQ_IMXINT 10
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#define IRQ_VLCDINT 11
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#define IRQ_USBINT 12
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#define IRQ_EMACINT 13
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#define IRQ_CCINT0 16
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#define IRQ_CCERRINT 17
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#define IRQ_TCERRINT0 18
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#define IRQ_TCERRINT 19
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#define IRQ_PSCIN 20
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#define IRQ_IDE 22
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#define IRQ_HPIINT 23
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#define IRQ_MBXINT 24
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#define IRQ_MBRINT 25
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#define IRQ_MMCINT 26
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#define IRQ_SDIOINT 27
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#define IRQ_MSINT 28
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#define IRQ_DDRINT 29
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#define IRQ_AEMIFINT 30
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#define IRQ_VLQINT 31
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#define IRQ_TINT0_TINT12 32
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#define IRQ_TINT0_TINT34 33
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#define IRQ_TINT1_TINT12 34
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#define IRQ_TINT1_TINT34 35
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#define IRQ_PWMINT0 36
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#define IRQ_PWMINT1 37
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#define IRQ_PWMINT2 38
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#define IRQ_I2C 39
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#define IRQ_UARTINT0 40
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#define IRQ_UARTINT1 41
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#define IRQ_UARTINT2 42
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#define IRQ_SPINT0 43
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#define IRQ_SPINT1 44
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#define IRQ_DSP2ARM0 46
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#define IRQ_DSP2ARM1 47
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#define IRQ_GPIO0 48
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#define IRQ_GPIO1 49
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#define IRQ_GPIO2 50
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#define IRQ_GPIO3 51
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#define IRQ_GPIO4 52
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#define IRQ_GPIO5 53
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#define IRQ_GPIO6 54
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#define IRQ_GPIO7 55
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#define IRQ_GPIOBNK0 56
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#define IRQ_GPIOBNK1 57
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#define IRQ_GPIOBNK2 58
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#define IRQ_GPIOBNK3 59
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#define IRQ_GPIOBNK4 60
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#define IRQ_COMMTX 61
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#define IRQ_COMMRX 62
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#define IRQ_EMUINT 63
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#define DAVINCI_N_AINTC_IRQ 64
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#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
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/* DaVinci DM6467-specific Interrupts */
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#define IRQ_DM646X_VP_VERTINT0 0
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#define IRQ_DM646X_VP_VERTINT1 1
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#define IRQ_DM646X_VP_VERTINT2 2
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#define IRQ_DM646X_VP_VERTINT3 3
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#define IRQ_DM646X_VP_ERRINT 4
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#define IRQ_DM646X_RESERVED_1 5
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#define IRQ_DM646X_RESERVED_2 6
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#define IRQ_DM646X_WDINT 7
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#define IRQ_DM646X_CRGENINT0 8
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#define IRQ_DM646X_CRGENINT1 9
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#define IRQ_DM646X_TSIFINT0 10
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#define IRQ_DM646X_TSIFINT1 11
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#define IRQ_DM646X_VDCEINT 12
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#define IRQ_DM646X_USBINT 13
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#define IRQ_DM646X_USBDMAINT 14
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#define IRQ_DM646X_PCIINT 15
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#define IRQ_DM646X_TCERRINT2 20
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#define IRQ_DM646X_TCERRINT3 21
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#define IRQ_DM646X_IDE 22
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#define IRQ_DM646X_HPIINT 23
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#define IRQ_DM646X_EMACRXTHINT 24
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#define IRQ_DM646X_EMACRXINT 25
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#define IRQ_DM646X_EMACTXINT 26
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#define IRQ_DM646X_EMACMISCINT 27
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#define IRQ_DM646X_MCASP0TXINT 28
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#define IRQ_DM646X_MCASP0RXINT 29
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#define IRQ_DM646X_RESERVED_3 31
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#define IRQ_DM646X_MCASP1TXINT 32
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#define IRQ_DM646X_VLQINT 38
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#define IRQ_DM646X_UARTINT2 42
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#define IRQ_DM646X_SPINT0 43
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#define IRQ_DM646X_SPINT1 44
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#define IRQ_DM646X_DSP2ARMINT 45
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#define IRQ_DM646X_RESERVED_4 46
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#define IRQ_DM646X_PSCINT 47
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#define IRQ_DM646X_GPIO0 48
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#define IRQ_DM646X_GPIO1 49
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#define IRQ_DM646X_GPIO2 50
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#define IRQ_DM646X_GPIO3 51
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#define IRQ_DM646X_GPIO4 52
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#define IRQ_DM646X_GPIO5 53
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#define IRQ_DM646X_GPIO6 54
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#define IRQ_DM646X_GPIO7 55
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#define IRQ_DM646X_GPIOBNK0 56
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#define IRQ_DM646X_GPIOBNK1 57
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#define IRQ_DM646X_GPIOBNK2 58
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#define IRQ_DM646X_DDRINT 59
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#define IRQ_DM646X_AEMIFINT 60
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/* DaVinci DM355-specific Interrupts */
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#define IRQ_DM355_CCDC_VDINT0 0
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#define IRQ_DM355_CCDC_VDINT1 1
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#define IRQ_DM355_CCDC_VDINT2 2
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#define IRQ_DM355_IPIPE_HST 3
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#define IRQ_DM355_H3AINT 4
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#define IRQ_DM355_IPIPE_SDR 5
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#define IRQ_DM355_IPIPEIFINT 6
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#define IRQ_DM355_OSDINT 7
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#define IRQ_DM355_VENCINT 8
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#define IRQ_DM355_IMCOPINT 11
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#define IRQ_DM355_RTOINT 13
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#define IRQ_DM355_TINT4 13
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#define IRQ_DM355_TINT2_TINT12 13
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#define IRQ_DM355_UARTINT2 14
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#define IRQ_DM355_TINT5 14
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#define IRQ_DM355_TINT2_TINT34 14
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#define IRQ_DM355_TINT6 15
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#define IRQ_DM355_TINT3_TINT12 15
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#define IRQ_DM355_SPINT1_0 17
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#define IRQ_DM355_SPINT1_1 18
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#define IRQ_DM355_SPINT2_0 19
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#define IRQ_DM355_SPINT2_1 21
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#define IRQ_DM355_TINT7 22
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#define IRQ_DM355_TINT3_TINT34 22
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#define IRQ_DM355_SDIOINT0 23
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#define IRQ_DM355_MMCINT0 26
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#define IRQ_DM355_MSINT 26
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#define IRQ_DM355_MMCINT1 27
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#define IRQ_DM355_PWMINT3 28
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#define IRQ_DM355_SDIOINT1 31
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#define IRQ_DM355_SPINT0_0 42
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#define IRQ_DM355_SPINT0_1 43
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#define IRQ_DM355_GPIO0 44
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#define IRQ_DM355_GPIO1 45
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#define IRQ_DM355_GPIO2 46
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#define IRQ_DM355_GPIO3 47
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#define IRQ_DM355_GPIO4 48
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#define IRQ_DM355_GPIO5 49
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#define IRQ_DM355_GPIO6 50
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#define IRQ_DM355_GPIO7 51
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#define IRQ_DM355_GPIO8 52
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#define IRQ_DM355_GPIO9 53
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#define IRQ_DM355_GPIOBNK0 54
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#define IRQ_DM355_GPIOBNK1 55
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#define IRQ_DM355_GPIOBNK2 56
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#define IRQ_DM355_GPIOBNK3 57
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#define IRQ_DM355_GPIOBNK4 58
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#define IRQ_DM355_GPIOBNK5 59
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#define IRQ_DM355_GPIOBNK6 60
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/* DaVinci DM365-specific Interrupts */
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#define IRQ_DM365_INSFINT 7
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#define IRQ_DM365_IMXINT1 8
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#define IRQ_DM365_IMXINT0 10
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#define IRQ_DM365_KLD_ARMINT 10
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#define IRQ_DM365_IMCOPINT 11
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#define IRQ_DM365_RTOINT 13
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#define IRQ_DM365_TINT5 14
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#define IRQ_DM365_TINT6 15
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#define IRQ_DM365_SPINT2_1 21
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#define IRQ_DM365_TINT7 22
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#define IRQ_DM365_SDIOINT0 23
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#define IRQ_DM365_MMCINT1 27
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#define IRQ_DM365_PWMINT3 28
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#define IRQ_DM365_SDIOINT1 31
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#define IRQ_DM365_SPIINT0_0 42
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#define IRQ_DM365_SPIINT3_0 43
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#define IRQ_DM365_GPIO0 44
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#define IRQ_DM365_GPIO1 45
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#define IRQ_DM365_GPIO2 46
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#define IRQ_DM365_GPIO3 47
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#define IRQ_DM365_GPIO4 48
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#define IRQ_DM365_GPIO5 49
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#define IRQ_DM365_GPIO6 50
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#define IRQ_DM365_GPIO7 51
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#define IRQ_DM365_EMAC_RXTHRESH 52
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#define IRQ_DM365_EMAC_RXPULSE 53
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#define IRQ_DM365_EMAC_TXPULSE 54
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#define IRQ_DM365_EMAC_MISCPULSE 55
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#define IRQ_DM365_GPIO12 56
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#define IRQ_DM365_GPIO13 57
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#define IRQ_DM365_GPIO14 58
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#define IRQ_DM365_GPIO15 59
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#define IRQ_DM365_ADCINT 59
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#define IRQ_DM365_KEYINT 60
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#define IRQ_DM365_TCERRINT2 61
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#define IRQ_DM365_TCERRINT3 62
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#define IRQ_DM365_EMUINT 63
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/* DA8XX interrupts */
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#define IRQ_DA8XX_COMMTX 0
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#define IRQ_DA8XX_COMMRX 1
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#define IRQ_DA8XX_NINT 2
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#define IRQ_DA8XX_EVTOUT0 3
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#define IRQ_DA8XX_EVTOUT1 4
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#define IRQ_DA8XX_EVTOUT2 5
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#define IRQ_DA8XX_EVTOUT3 6
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#define IRQ_DA8XX_EVTOUT4 7
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#define IRQ_DA8XX_EVTOUT5 8
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#define IRQ_DA8XX_EVTOUT6 9
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#define IRQ_DA8XX_EVTOUT7 10
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#define IRQ_DA8XX_CCINT0 11
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#define IRQ_DA8XX_CCERRINT 12
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#define IRQ_DA8XX_TCERRINT0 13
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#define IRQ_DA8XX_AEMIFINT 14
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#define IRQ_DA8XX_I2CINT0 15
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#define IRQ_DA8XX_MMCSDINT0 16
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#define IRQ_DA8XX_MMCSDINT1 17
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#define IRQ_DA8XX_ALLINT0 18
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#define IRQ_DA8XX_RTC 19
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#define IRQ_DA8XX_SPINT0 20
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#define IRQ_DA8XX_TINT12_0 21
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#define IRQ_DA8XX_TINT34_0 22
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#define IRQ_DA8XX_TINT12_1 23
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#define IRQ_DA8XX_TINT34_1 24
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#define IRQ_DA8XX_UARTINT0 25
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#define IRQ_DA8XX_KEYMGRINT 26
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#define IRQ_DA8XX_SECINT 26
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#define IRQ_DA8XX_SECKEYERR 26
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#define IRQ_DA8XX_CHIPINT0 28
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#define IRQ_DA8XX_CHIPINT1 29
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#define IRQ_DA8XX_CHIPINT2 30
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#define IRQ_DA8XX_CHIPINT3 31
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#define IRQ_DA8XX_TCERRINT1 32
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#define IRQ_DA8XX_C0_RX_THRESH_PULSE 33
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#define IRQ_DA8XX_C0_RX_PULSE 34
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#define IRQ_DA8XX_C0_TX_PULSE 35
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#define IRQ_DA8XX_C0_MISC_PULSE 36
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#define IRQ_DA8XX_C1_RX_THRESH_PULSE 37
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#define IRQ_DA8XX_C1_RX_PULSE 38
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#define IRQ_DA8XX_C1_TX_PULSE 39
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#define IRQ_DA8XX_C1_MISC_PULSE 40
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#define IRQ_DA8XX_MEMERR 41
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#define IRQ_DA8XX_GPIO0 42
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#define IRQ_DA8XX_GPIO1 43
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#define IRQ_DA8XX_GPIO2 44
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#define IRQ_DA8XX_GPIO3 45
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#define IRQ_DA8XX_GPIO4 46
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#define IRQ_DA8XX_GPIO5 47
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#define IRQ_DA8XX_GPIO6 48
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#define IRQ_DA8XX_GPIO7 49
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#define IRQ_DA8XX_GPIO8 50
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#define IRQ_DA8XX_I2CINT1 51
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#define IRQ_DA8XX_LCDINT 52
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#define IRQ_DA8XX_UARTINT1 53
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#define IRQ_DA8XX_MCASPINT 54
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#define IRQ_DA8XX_ALLINT1 55
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#define IRQ_DA8XX_SPINT1 56
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#define IRQ_DA8XX_UHPI_INT1 57
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#define IRQ_DA8XX_USB_INT 58
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#define IRQ_DA8XX_IRQN 59
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#define IRQ_DA8XX_RWAKEUP 60
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#define IRQ_DA8XX_UARTINT2 61
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#define IRQ_DA8XX_DFTSSINT 62
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#define IRQ_DA8XX_EHRPWM0 63
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#define IRQ_DA8XX_EHRPWM0TZ 64
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#define IRQ_DA8XX_EHRPWM1 65
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#define IRQ_DA8XX_EHRPWM1TZ 66
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#define IRQ_DA8XX_ECAP0 69
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#define IRQ_DA8XX_ECAP1 70
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#define IRQ_DA8XX_ECAP2 71
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#define IRQ_DA8XX_ARMCLKSTOPREQ 90
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/* DA830 specific interrupts */
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#define IRQ_DA830_MPUERR 27
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#define IRQ_DA830_IOPUERR 27
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#define IRQ_DA830_BOOTCFGERR 27
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#define IRQ_DA830_EHRPWM2 67
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#define IRQ_DA830_EHRPWM2TZ 68
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#define IRQ_DA830_EQEP0 72
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#define IRQ_DA830_EQEP1 73
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#define IRQ_DA830_T12CMPINT0_0 74
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#define IRQ_DA830_T12CMPINT1_0 75
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#define IRQ_DA830_T12CMPINT2_0 76
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#define IRQ_DA830_T12CMPINT3_0 77
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#define IRQ_DA830_T12CMPINT4_0 78
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#define IRQ_DA830_T12CMPINT5_0 79
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#define IRQ_DA830_T12CMPINT6_0 80
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#define IRQ_DA830_T12CMPINT7_0 81
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#define IRQ_DA830_T12CMPINT0_1 82
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#define IRQ_DA830_T12CMPINT1_1 83
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#define IRQ_DA830_T12CMPINT2_1 84
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#define IRQ_DA830_T12CMPINT3_1 85
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#define IRQ_DA830_T12CMPINT4_1 86
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#define IRQ_DA830_T12CMPINT5_1 87
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#define IRQ_DA830_T12CMPINT6_1 88
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#define IRQ_DA830_T12CMPINT7_1 89
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#define DA830_N_CP_INTC_IRQ 96
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/* DA850 speicific interrupts */
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#define IRQ_DA850_MPUADDRERR0 27
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#define IRQ_DA850_MPUPROTERR0 27
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#define IRQ_DA850_IOPUADDRERR0 27
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#define IRQ_DA850_IOPUPROTERR0 27
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#define IRQ_DA850_IOPUADDRERR1 27
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#define IRQ_DA850_IOPUPROTERR1 27
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#define IRQ_DA850_IOPUADDRERR2 27
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#define IRQ_DA850_IOPUPROTERR2 27
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#define IRQ_DA850_BOOTCFG_ADDR_ERR 27
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#define IRQ_DA850_BOOTCFG_PROT_ERR 27
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#define IRQ_DA850_MPUADDRERR1 27
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#define IRQ_DA850_MPUPROTERR1 27
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#define IRQ_DA850_IOPUADDRERR3 27
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#define IRQ_DA850_IOPUPROTERR3 27
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#define IRQ_DA850_IOPUADDRERR4 27
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#define IRQ_DA850_IOPUPROTERR4 27
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#define IRQ_DA850_IOPUADDRERR5 27
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#define IRQ_DA850_IOPUPROTERR5 27
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#define IRQ_DA850_MIOPU_BOOTCFG_ERR 27
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#define IRQ_DA850_SATAINT 67
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#define IRQ_DA850_TINT12_2 68
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#define IRQ_DA850_TINT34_2 68
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#define IRQ_DA850_TINTALL_2 68
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#define IRQ_DA850_MMCSDINT0_1 72
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#define IRQ_DA850_MMCSDINT1_1 73
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#define IRQ_DA850_T12CMPINT0_2 74
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#define IRQ_DA850_T12CMPINT1_2 75
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#define IRQ_DA850_T12CMPINT2_2 76
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#define IRQ_DA850_T12CMPINT3_2 77
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#define IRQ_DA850_T12CMPINT4_2 78
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#define IRQ_DA850_T12CMPINT5_2 79
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#define IRQ_DA850_T12CMPINT6_2 80
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#define IRQ_DA850_T12CMPINT7_2 81
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#define IRQ_DA850_T12CMPINT0_3 82
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#define IRQ_DA850_T12CMPINT1_3 83
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#define IRQ_DA850_T12CMPINT2_3 84
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#define IRQ_DA850_T12CMPINT3_3 85
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#define IRQ_DA850_T12CMPINT4_3 86
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#define IRQ_DA850_T12CMPINT5_3 87
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#define IRQ_DA850_T12CMPINT6_3 88
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#define IRQ_DA850_T12CMPINT7_3 89
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#define IRQ_DA850_RPIINT 91
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#define IRQ_DA850_VPIFINT 92
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#define IRQ_DA850_CCINT1 93
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#define IRQ_DA850_CCERRINT1 94
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#define IRQ_DA850_TCERRINT2 95
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#define IRQ_DA850_TINT12_3 96
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#define IRQ_DA850_TINT34_3 96
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#define IRQ_DA850_TINTALL_3 96
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#define IRQ_DA850_MCBSP0RINT 97
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#define IRQ_DA850_MCBSP0XINT 98
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#define IRQ_DA850_MCBSP1RINT 99
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#define IRQ_DA850_MCBSP1XINT 100
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#define DA850_N_CP_INTC_IRQ 101
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/* da850 currently has the most gpio pins (144) */
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#define DAVINCI_N_GPIO 144
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/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
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#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
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#endif /* __ASM_ARCH_IRQS_H */
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