a033a487f8
ppc32 has it already, add it to ppc64 as a preliminary for adding support for Book3E 64-bit support Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
55 lines
2.0 KiB
C
55 lines
2.0 KiB
C
#ifndef _ASM_POWERPC_PTE_HASH64_H
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#define _ASM_POWERPC_PTE_HASH64_H
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#ifdef __KERNEL__
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/*
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* Common bits between 4K and 64K pages in a linux-style PTE.
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* These match the bits in the (hardware-defined) PowerPC PTE as closely
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* as possible. Additional bits may be defined in pgtable-hash64-*.h
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*
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* Note: We only support user read/write permissions. Supervisor always
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* have full read/write to pages above PAGE_OFFSET (pages below that
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* always use the user access permissions).
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*
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* We could create separate kernel read-only if we used the 3 PP bits
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* combinations that newer processors provide but we currently don't.
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*/
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#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
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#define _PAGE_USER 0x0002 /* matches one of the PP bits */
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#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
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#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
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#define _PAGE_GUARDED 0x0008
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#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
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#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
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#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
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#define _PAGE_DIRTY 0x0080 /* C: page changed */
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#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
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#define _PAGE_RW 0x0200 /* software: user write access allowed */
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#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
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/* No separate kernel read-only */
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#define _PAGE_KERNEL_RW (_PAGE_RW | _PAGE_DIRTY) /* user access blocked by key */
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#define _PAGE_KERNEL_RO _PAGE_KERNEL_RW
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/* Strong Access Ordering */
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#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
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/* No page size encoding in the linux PTE */
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#define _PAGE_PSIZE 0
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/* PTEIDX nibble */
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#define _PTEIDX_SECONDARY 0x8
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#define _PTEIDX_GROUP_IX 0x7
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/* Hash table based platforms need atomic updates of the linux PTE */
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#define PTE_ATOMIC_UPDATES 1
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#ifdef CONFIG_PPC_64K_PAGES
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#include <asm/pte-hash64-64k.h>
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#else
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#include <asm/pte-hash64-4k.h>
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PTE_HASH64_H */
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